Handed Cadence and HFSS to an LLM, researchers got a 240 to 251 GHz transmitter design. Semi-autonomous, not hands-off. Read the fine print.
smartchunks.com/llm-agent-e...
smartchunks.com/llm-agent-e...
An LLM Agent Drove Cadence And HFSS To Design A Sub-THz Transmitter | Smart Chunks
TACS-RF uses an LLM agent (Claude Opus 4.8) to drive Cadence, Calibre and HFSS and design a 240 to 251 GHz sub-THz transmitter in 90 nm SiGe BiCMOS.
smartchunks.com
October 26, 2026 at 1:26 PM
Handed Cadence and HFSS to an LLM, researchers got a 240 to 251 GHz transmitter design. Semi-autonomous, not hands-off. Read the fine print.
smartchunks.com/llm-agent-e...
smartchunks.com/llm-agent-e...
I've been watching $ADI: Analog Devices must stitch SiGe/BiCMOS RF and 40-28nm mixed-signal ADCs to N3/N5 Alif AI chiplets via CoWoS/EMIB. TSV/BEOL thermal will shave ~20-25% TOPS/W; market underrates system-level moat.
October 23, 2026 at 5:08 PM
I've been watching $ADI: Analog Devices must stitch SiGe/BiCMOS RF and 40-28nm mixed-signal ADCs to N3/N5 Alif AI chiplets via CoWoS/EMIB. TSV/BEOL thermal will shave ~20-25% TOPS/W; market underrates system-level moat.
Tower Semiconductor showcasing silicon photonics and SiGe BiCMOS for AI datacentre optics and telecom at ECOC 2026 in Malaga.
Tower Semiconductor to showcase SiPho and SiGe platforms at ECOC 2026
The Israeli foundry will demonstrate silicon photonics and SiGe BiCMOS solutions for AI infrastructure, datacentre optics and telecom at the Malaga event.
datatech.disruptsmedia.com
September 22, 2026 at 10:16 AM
Tower Semiconductor showcasing silicon photonics and SiGe BiCMOS for AI datacentre optics and telecom at ECOC 2026 in Malaga.
I've been watching $TXN: Texas Instruments leans 40nm BiCMOS I/O + 28nm CMOS logic, GaN power topology, 2GS/s ADC ~11.5 ENOB. https://www.electronicsforyou.biz/eb-specials/the-next-breakthrough-in-power-electronics-may-come-from-topology-not-silicon-brian-king-texas-instruments-ti/
September 19, 2026 at 1:02 PM
I've been watching $TXN: Texas Instruments leans 40nm BiCMOS I/O + 28nm CMOS logic, GaN power topology, 2GS/s ADC ~11.5 ENOB. https://www.electronicsforyou.biz/eb-specials/the-next-breakthrough-in-power-electronics-may-come-from-topology-not-silicon-brian-king-texas-instruments-ti/
The node mix carries the point. BiCMOS I/O beside 28nm logic says the binding constraint in the signal chain sits in the analogue front end and the converter, not the digital. That is the part that stops tracking the shrink curve, so the design margin gets spent there.
September 19, 2026 at 2:05 PM
The node mix carries the point. BiCMOS I/O beside 28nm logic says the binding constraint in the signal chain sits in the analogue front end and the converter, not the digital. That is the part that stops tracking the shrink curve, so the design margin gets spent there.
I've been watching $ADI and see Analog Devices buying Alif: 32-bit AI MCUs on 28nm BiCMOS I/O, 2GS/s pipelined ADC (~12.5 ENOB), 40V PMICs. Edge-AI yield arbitrage.
September 17, 2026 at 9:07 PM
I've been watching $ADI and see Analog Devices buying Alif: 32-bit AI MCUs on 28nm BiCMOS I/O, 2GS/s pipelined ADC (~12.5 ENOB), 40V PMICs. Edge-AI yield arbitrage.
Texas Instruments ($TXN) runs 40nm BiCMOS + 28nm CMOS for mixed-signal and adopts GaN topology for power. Expect 3x power-density, yield arbitrage overlooked. I use @bluestocks.app #finsky
September 17, 2026 at 4:06 PM
Texas Instruments ($TXN) runs 40nm BiCMOS + 28nm CMOS for mixed-signal and adopts GaN topology for power. Expect 3x power-density, yield arbitrage overlooked. I use @bluestocks.app #finsky
🚀 #HighlyCitedPaper!
⚡Low-Power Silicon-Based Frequency Dividers: An Overview
🔗Read at: mdpi.com/2079-9292/14...
#frequencydivider #lowpowerconsumption #currentmodelogic #injectionlocking #truesinglephaseclock #latch #CMOS #BiCMOS #FinFET
⚡Low-Power Silicon-Based Frequency Dividers: An Overview
🔗Read at: mdpi.com/2079-9292/14...
#frequencydivider #lowpowerconsumption #currentmodelogic #injectionlocking #truesinglephaseclock #latch #CMOS #BiCMOS #FinFET
September 16, 2026 at 3:19 AM
🚀 #HighlyCitedPaper!
⚡Low-Power Silicon-Based Frequency Dividers: An Overview
🔗Read at: mdpi.com/2079-9292/14...
#frequencydivider #lowpowerconsumption #currentmodelogic #injectionlocking #truesinglephaseclock #latch #CMOS #BiCMOS #FinFET
⚡Low-Power Silicon-Based Frequency Dividers: An Overview
🔗Read at: mdpi.com/2079-9292/14...
#frequencydivider #lowpowerconsumption #currentmodelogic #injectionlocking #truesinglephaseclock #latch #CMOS #BiCMOS #FinFET
Watching Texas Instrumenst; $TXN (Texas Instruments): 40nm BiCMOS + 28nm CMOS, GaN topolgy. https://www.electronicsforyou.biz/eb-specials/the-next-breakthrough-in-power-electronics-may-come-from-topology-not-silicon-brian-king-texas-instruments-ti/
September 15, 2026 at 9:03 PM
Watching Texas Instrumenst; $TXN (Texas Instruments): 40nm BiCMOS + 28nm CMOS, GaN topolgy. https://www.electronicsforyou.biz/eb-specials/the-next-breakthrough-in-power-electronics-may-come-from-topology-not-silicon-brian-king-texas-instruments-ti/
Watching $ADI: Analog Devices mixes BiCMOS + 28nm logc, 2GS/s pipelined ADC ~12.5 ENOB, 40V PMICs; market underprices their calibation edge. I use @bluestocks.app #finsky
September 15, 2026 at 1:08 PM
Watching $ADI: Analog Devices mixes BiCMOS + 28nm logc, 2GS/s pipelined ADC ~12.5 ENOB, 40V PMICs; market underprices their calibation edge. I use @bluestocks.app #finsky
Analog Devices $ADI: Alif 32-bit AI MCU + 28nm BiCMOS I/O; bold, timly bet. https://www.spglobal.com/market-intelligence/en/news-insights/research/2026/09/analog-devices-expands-ai-footprint-as-growth-accelerates
September 15, 2026 at 4:02 PM
Analog Devices $ADI: Alif 32-bit AI MCU + 28nm BiCMOS I/O; bold, timly bet. https://www.spglobal.com/market-intelligence/en/news-insights/research/2026/09/analog-devices-expands-ai-footprint-as-growth-accelerates
Han Zhou, Yu Yan, Haojie Chang, Herbert Zirath: An Efficient W-/D-Band Power Amplifier in a 130 nm SiGe BiCMOS Process https://arxiv.org/abs/2608.24687 https://arxiv.org/pdf/2608.24687 https://arxiv.org/html/2608.24687
August 26, 2026 at 6:45 AM
Han Zhou, Yu Yan, Haojie Chang, Herbert Zirath: An Efficient W-/D-Band Power Amplifier in a 130 nm SiGe BiCMOS Process https://arxiv.org/abs/2608.24687 https://arxiv.org/pdf/2608.24687 https://arxiv.org/html/2608.24687
oh well ... completely puzzled. next question: bicmos does anything there or is just useless?
August 25, 2026 at 8:43 PM
oh well ... completely puzzled. next question: bicmos does anything there or is just useless?
100% I would regret that purchase. Nevermind. Anywho I got photos of chips around here somewhere. These will have to do for now.
June 21, 2026 at 3:58 PM
100% I would regret that purchase. Nevermind. Anywho I got photos of chips around here somewhere. These will have to do for now.
Innovation in ZMOS process node led to development of modern CMOS and BiCMOS process node where we have 20 metal layers.
For instance, Sky130A 130nm process node have upto 5 metal layers.
bsky.app/profile/roha...
For instance, Sky130A 130nm process node have upto 5 metal layers.
bsky.app/profile/roha...
Low power math within few clock cycles.
Imagine it, then put it into silicon.
Made by Vicharak aka @aksharvastarpara.bsky.social 's team and two FPGA freaks.
Check - t.co/vBGGA2i0uX
Thanks @mattvenn.net and @urishaked.bsky.social and whole @tinytapeout.com team for making this possible.
Imagine it, then put it into silicon.
Made by Vicharak aka @aksharvastarpara.bsky.social 's team and two FPGA freaks.
Check - t.co/vBGGA2i0uX
Thanks @mattvenn.net and @urishaked.bsky.social and whole @tinytapeout.com team for making this possible.
October 28, 2025 at 5:12 AM
Innovation in ZMOS process node led to development of modern CMOS and BiCMOS process node where we have 20 metal layers.
For instance, Sky130A 130nm process node have upto 5 metal layers.
bsky.app/profile/roha...
For instance, Sky130A 130nm process node have upto 5 metal layers.
bsky.app/profile/roha...
implement Basilisk in IHP's open 130 nm BiCMOS technology, significantly improving on the state-of-the-art (SoA) OSEDA flow. Our enhancements of the Yosys-based synthesis flow improve design timing and area by 2.3x and 1.6x, respectively, while [4/6 of https://arxiv.org/abs/2505.10060v1]
May 16, 2025 at 5:54 AM
implement Basilisk in IHP's open 130 nm BiCMOS technology, significantly improving on the state-of-the-art (SoA) OSEDA flow. Our enhancements of the Yosys-based synthesis flow improve design timing and area by 2.3x and 1.6x, respectively, while [4/6 of https://arxiv.org/abs/2505.10060v1]
Philippe Sauter, Thomas Benz, Paul Scheffler, Martin Povi\v{s}er, Frank K. G\"urkaynak, Luca Benini: Basilisk: A 34 mm2 End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS https://arxiv.org/abs/2505.10060 https://arxiv.org/pdf/2505.10060 https://arxiv.org/html/2505.10060
May 16, 2025 at 5:54 AM
Philippe Sauter, Thomas Benz, Paul Scheffler, Martin Povi\v{s}er, Frank K. G\"urkaynak, Luca Benini: Basilisk: A 34 mm2 End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS https://arxiv.org/abs/2505.10060 https://arxiv.org/pdf/2505.10060 https://arxiv.org/html/2505.10060
Electrical Drive of a Josephson Junction Array using a Cryogenic BiCMOS Pulse Pattern Generator: Towards a Fully Integrated Josephson Arbitrary Waveform Synthesizer
https://arxiv.org/pdf/2512.20367
Yerzhan Kudabay et al.
https://arxiv.org/pdf/2512.20367
Yerzhan Kudabay et al.
https://arxiv.org/abs/2512.20367
arXiv abstract link
arxiv.org
December 24, 2025 at 4:32 AM
Electrical Drive of a Josephson Junction Array using a Cryogenic BiCMOS Pulse Pattern Generator: Towards a Fully Integrated Josephson Arbitrary Waveform Synthesizer
https://arxiv.org/pdf/2512.20367
Yerzhan Kudabay et al.
https://arxiv.org/pdf/2512.20367
Yerzhan Kudabay et al.
High yield, low disorder Si/SiGe heterostructures for spin qubit devices manufactured in a BiCMOS pilot line
https://arxiv.org/pdf/2506.14660
Alberto Mistroni et al.
https://arxiv.org/pdf/2506.14660
Alberto Mistroni et al.
https://arxiv.org/abs/2506.14660
arXiv abstract link
arxiv.org
June 18, 2025 at 4:32 AM
High yield, low disorder Si/SiGe heterostructures for spin qubit devices manufactured in a BiCMOS pilot line
https://arxiv.org/pdf/2506.14660
Alberto Mistroni et al.
https://arxiv.org/pdf/2506.14660
Alberto Mistroni et al.
📚 A new @corenext.bsky.social scientific publication presents an energy-efficient high data rate transmitter operating at 0.3 THz, implemented in 90-nm SiGe BiCMOS technology. Read the publication here: zenodo.org/records/1849...
February 5, 2026 at 11:43 AM
📚 A new @corenext.bsky.social scientific publication presents an energy-efficient high data rate transmitter operating at 0.3 THz, implemented in 90-nm SiGe BiCMOS technology. Read the publication here: zenodo.org/records/1849...
📚Holiday reading suggestion from the @corenext.bsky.social Holiday Library is “Ultra-Broadband Frequency Multiplier (×8) Chain in 90-nm SiGe BiCMOS Technology at H-band”. This work offers a concise and technical insight into high-frequency circuit design⤵️
www.linkedin.com/pulse/corene...
www.linkedin.com/pulse/corene...
COREnext Holiday Library
18.12.
www.linkedin.com
December 29, 2025 at 10:19 AM
📚Holiday reading suggestion from the @corenext.bsky.social Holiday Library is “Ultra-Broadband Frequency Multiplier (×8) Chain in 90-nm SiGe BiCMOS Technology at H-band”. This work offers a concise and technical insight into high-frequency circuit design⤵️
www.linkedin.com/pulse/corene...
www.linkedin.com/pulse/corene...
💡 Another highlight at European Microwave Week was the presentation of the paper “Ultra-Broadband Frequency Multiplier (x8) Chain in 90-nm SiGe BiCMOS Technology at H-band”. It was elaborated by Frida Strömbeck, Herbert Zirath(Chalmers University), and Klaus Aufinger from Infineon Technologies AG 👏
September 26, 2025 at 11:36 AM
💡 Another highlight at European Microwave Week was the presentation of the paper “Ultra-Broadband Frequency Multiplier (x8) Chain in 90-nm SiGe BiCMOS Technology at H-band”. It was elaborated by Frida Strömbeck, Herbert Zirath(Chalmers University), and Klaus Aufinger from Infineon Technologies AG 👏
Kudabay, Kieler, Starkloff, Schubert, Haas, Kohlmann, Bieler, Issakov: Electrical Drive of a Josephson Junction Array using a Cryogenic BiCMOS Pulse Pattern Generator: Towards a Fully Integra... https://arxiv.org/abs/2512.20367 https://arxiv.org/pdf/2512.20367 https://arxiv.org/html/2512.20367
December 24, 2025 at 6:43 AM
Kudabay, Kieler, Starkloff, Schubert, Haas, Kohlmann, Bieler, Issakov: Electrical Drive of a Josephson Junction Array using a Cryogenic BiCMOS Pulse Pattern Generator: Towards a Fully Integra... https://arxiv.org/abs/2512.20367 https://arxiv.org/pdf/2512.20367 https://arxiv.org/html/2512.20367
An unusual feature of the Pentium is that it is constructed from BiCMOS. Most computers use a type of circuitry called CMOS. However, the Pentium also includes bipolar transistors, faster at the time.
The ×3 circuit uses some bipolar (NPN) transistors, huge compared to the skinny MOS transistors.
The ×3 circuit uses some bipolar (NPN) transistors, huge compared to the skinny MOS transistors.
March 2, 2025 at 6:29 PM
An unusual feature of the Pentium is that it is constructed from BiCMOS. Most computers use a type of circuitry called CMOS. However, the Pentium also includes bipolar transistors, faster at the time.
The ×3 circuit uses some bipolar (NPN) transistors, huge compared to the skinny MOS transistors.
The ×3 circuit uses some bipolar (NPN) transistors, huge compared to the skinny MOS transistors.