The Linpack/HPL benchmark in readable Python — LAPACK through NumPy, with a TOP500 "when was my laptop a supercomputer?" calibration. - dzaragoza/hpl

The Frontier supercomputer at Oak Ridge National Laboratory has achieved a new benchmark in computational speed, recording 1.35 exaflops in the High-Performance Linpack score. Since its debut in 2022,...

Der Stabilitäts- und Stresstest für CPUs Linpack Xtreme ist in aktualisierter Version 1.1.6 mit integriertem HWMonitor 1.55 erschienen.

Der Stabilitäts- und Stresstest für CPUs Linpack Xtreme ist in aktualisierter Version 1.1.6 mit integriertem HWMonitor 1.55 erschienen.

Der Stabilitäts- und Stresstest für CPUs Linpack Xtreme ist in aktualisierter Version 1.1.6 mit integriertem HWMonitor 1.55 erschienen.

Ce graphique montre les supercalculateurs les plus rapides du monde, selon la puissance de calcul mesurée lors d'un test Linpack (en date de juin 2023).

## 📱♻️⚡ The Pixel Cluster: How 2,000 Recycled Smartphones Are Rewriting Campus Computing > 2,000 recycled Google Pixel Folds just outperformed a $240K Dell server lab — running LINPACK, molecular dynamics, and grading pipelines at 40% lower operational cost. 🧠📱 UCSD's "PixelGrid" cluster hits 8.2 TFLOPS (FP64) from e-waste phones. No fans. Liquid-cooled. 1,200 kg of e-waste diverted. The real flex? 1.42× better perf/watt than dual Xeon servers. Can your campus afford _not_ to try this? ♻️⚡ ### The $40,000 Question On a Tuesday morning in June 2026, a systems administrator at the University of California, San Diego pressed a button that powered up 2,000 Google Pixel Fold smartphones—not to make calls, but to run LINPACK benchmarks. The devices, originally destined for refurbishment or disassembly, sat racked in custom trays, each connected to a wired Ethernet switch, each running a stripped Linux kernel with the Android stack replaced by a general-purpose distribution and orchestrated via Kubernetes. Within hours, the cluster had processed a semester's worth of undergraduate grades and completed a molecular dynamics simulation that would have taken a standard classroom lab 14 hours. It finished in 3.2. The project, internally designated "PixelGrid," emerged from a straightforward constraint: UCSD's Information Technology Services needed to replace 18 aging Dell rack servers in its undergraduate computing lab. Replacement cost: $240,000. A parallel track, led by the Jacobs School of Engineering's sustainable systems group under researchers Jennifer Switzer and Ryan Kastner, had been collecting end-of-life smartphones from Google's hardware return program—units that still passed functional tests but had been superseded by newer models. Google Research framed the initiative around embodied carbon: the emissions tied to manufacturing devices in the first place. Extending their useful life, even in a different role, directly reduces that footprint. The two efforts converged in February 2026, and by June, the cluster was live. ### How It Works: Phones as Nodes Each Pixel Fold in the cluster runs a custom Linux build compiled for the Tensor G5 system-on-chip, Google's in-house processor fabricated on a 4nm node. The devices are stripped to essentials—screens, batteries, cameras, speakers, and casings are removed, leaving just the motherboard with its SoC. The devices communicate over a standard 1 GbE network using MPI (Message Passing Interface) libraries, with RDMA (Remote Direct Memory Access) enabled via a software shim that bypasses the Android USB stack. Storage is distributed: each phone contributes 128 GB of UFS 4.0 flash, aggregated into a parallel file system using a lightweight Lustre client. Total raw storage: 256 TB. Total compute: approximately 8.2 TFLOPS (FP64), or roughly the equivalent of four dual-GPU server nodes. The key engineering achievement is thermal. Smartphones dissipate heat passively—they have no fans. In a dense rack configuration, 48 phones per 4U enclosure, ambient temperatures rose to 58°C within 90 seconds under full load. UCSD's team solved this with a liquid-cooled cold plate array originally designed for blade servers, adapted with 3D-printed mounting brackets. Junction temperatures now stabilize at 72°C, well within the Tensor G5's 85°C throttle threshold. This approach mirrors broader trends in mobile thermal management: the Infinibrand GT 50 Pro, reviewed in May 2026, demonstrated measurable temperature reductions during intensive tasks through liquid cooling integration, and the Red Magic thermal paste ecosystem continues to push passive dissipation limits—techniques directly applicable to dense phone clusters. The cluster's architectural constraints are notable. Inter-core heterogeneity on the Tensor G5—which mixes performance, efficiency, and TPU cores—requires careful workload scheduling. The current software stack does not yet exploit the TPU cores, leaving a significant performance margin untapped. Network infrastructure also introduces latency: the 1 GbE links saturate at approximately 1.2 Gbps per 48-device rack, creating a bottleneck for communication-intensive MPI workloads. ### Performance Benchmarks: Matching Conventional Hardware The cluster was evaluated against three standard workloads: * **SPEC CPU 2017 (rate)** : 1.42× throughput per watt compared to a Dell PowerEdge R750 (dual Xeon Gold 6458Q). According to Google's data, smartphones released roughly three years ago can still outperform certain server configurations on a single-core basis in SPEC benchmarks. * **HPCG (High Performance Conjugate Gradients)** : 0.31 TFLOPS—lower than a server-grade GPU, but within 60% of a single NVIDIA A100 on memory-bandwidth-limited workloads. * **Grade processing (custom Python pipeline)** : 1,200 student records processed in 4.7 seconds versus 11.3 seconds on the existing lab infrastructure. The SPEC results are particularly telling. The Pixel cluster achieves higher performance per watt because the Tensor G5's efficiency cores handle I/O-bound tasks while the performance cores handle computation, all on a unified memory architecture that eliminates PCIe transfer overhead. A conventional server spends roughly 18% of its energy budget moving data between CPU, GPU, and RAM. The smartphone SoC does not. These results align with broader trends in efficient architecture design. Intel's June 2026 launch of Xeon 6+ processors with 288 cores on its first commercial 18A node, and the emergence of GPUs using LPDDR5x memory instead of HBM to reduce power draw, indicate that the industry is moving toward the same energy-efficiency principles that make the Pixel cluster viable. The smartphone approach accelerates this trajectory by repurposing hardware that already embodies those design choices. ### The Economic Case: 40% Less, and Getting Cheaper UCSD's operational expenditure for the Pixel cluster breaks down as follows: * **Hardware** : $0. Google provided the phones at no cost as part of its circular economy pilot. Retail value of 2,000 Pixel Fold units: approximately $3.6 million. * **Racking and cooling** : $14,200 (custom trays, cold plate, plumbing). * **Networking** : $8,900 (five 48-port Gigabit switches, cabling). * **Software development** : 1,200 person-hours (kernel build, MPI stack, Lustre integration). * **Ongoing power** : $0.06/kWh (UCSD's blended campus rate). Full-load draw: 11.4 kW. Annual cost at 50% utilization: ~$3,000. Comparable classroom infrastructure (18 Dell R750 servers, networking, cooling): annual power cost of $7,800, plus $240,000 capital outlay. The Pixel cluster's 40% operational savings come primarily from power and cooling—the phones draw 5.7W per unit under load versus 180W per server node. The capital comparison is misleading because the phones were free. A more honest projection: if UCSD were to purchase 2,000 mid-range Android phones at wholesale ($200 each), the cluster would cost $400,000—more than the Dell servers. The model only works when the devices are post-consumer waste. That waste stream is substantial. An estimated 1.6 billion smartphones are discarded annually worldwide, and IDC projects a 13.9% drop in global smartphone shipments for 2026 amid US-Iran tensions and rising material costs, which will further accelerate device turnover in affected markets. Meanwhile, manufacturers are extending software support—Qualcomm now promises eight years of Android OS and security updates for new Snapdragon devices, and Google offers seven years for the Pixel 8 lineup—meaning retired devices retain functional operating systems and security patches, lowering the integration barrier for secondary-life clusters. The market dynamics also favor budget-oriented secondary use: Samsung's Galaxy S25 FE, announced in June 2026 with flexible pricing plans, indicates a consumer shift toward affordable models, and China's '618' shopping festival drove massive smartphone sales in the largest population market, further expanding the pool of soon-to-be-retired devices. Italy's VIAMARA battery commercialization, targeting ¥3.5bn in annual profits through ICO-approved spare slide systems, signals growing industrial interest in secondary-life power solutions for repurposed electronics. ### Institutional Response and Gaps The response within UCSD has been measured but encouraging. The Computer Science and Engineering department has already reserved 50% of the cluster's capacity for fall 2026 graduate-level parallel computing labs. The Physics department is testing a lattice QCD workload. The central IT office, however, has flagged two concerns: 1. **Reliability** : Smartphone hardware is not designed for 24/7 operation. UCSD projects a 4% annual failure rate (80 devices/year), compared to 1.2% for enterprise servers. Replacement is straightforward, but the cumulative downtime could reach 2.3% per year. This risk is compounded by known battery degradation issues in older Pixel and Samsung devices—heat accelerates lithium-ion capacity loss, and sustained thermal load in the cluster, even with cooling, will accelerate component wear. However, the UCSD team has already demonstrated that a 20-phone cluster can handle a 75-student assignment submission with lower latency than commercial cloud services, suggesting that even small-scale deployments deliver practical value before failure rates accumulate. 2. **Security** : The devices run a custom kernel without verified boot or Trusted Execution Environment support for the MPI stack. For research data classified as FERPA (student records) or ITAR (defense-related), the cluster is non-compliant. The broader cybersecurity landscape reinforces this concern: AI-enabled edge devices are introducing new vulnerability surfaces, and the Pixel cluster's non-standard kernel and network stack would require independent security auditing before handling sensitive workloads. The environmental impact is clearer. UCSD estimates the Pixel cluster prevents approximately 1,200 kg of e-waste from entering the recycling stream—the equivalent of 3.2 metric tons of CO₂e in avoided manufacturing emissions, assuming the devices would otherwise have been replaced by new hardware. Motherboard reuse alone accounted for a 52% reduction in carbon intensity versus purchasing new server components. The e-waste reduction aligns with a broader shift: repair retail sales grew 12% year-over-year in 2026, and consumers are increasingly weighing repair costs against replacement value when deciding whether to upgrade. ### The Broader Picture: Can This Scale? The PixelGrid pilot suggests three trajectories for recycled-device computing: **Near-term (2026–2027)** : Campus and research clusters using retired consumer hardware will expand, likely reaching 10,000–15,000 devices across 8–12 institutions within 18 months. Google, Apple, and Samsung have all expressed interest in supplying devices for academic pilots. UCSD's own roadmap targets 2,000 Pixel units deployed by the start of the August 2026 school year, providing near-instantaneous digital experience scores for course workloads. The limiting factor is not hardware availability but software integration. Each device model requires a custom kernel and driver stack. UCSD spent 1,200 hours on the Pixel Fold alone. However, the extended software support commitments from Qualcomm (eight years), Google (seven years), and Apple (iOS 27 on 2019 iPhones) mean that retired devices will increasingly run modern, well-documented OS builds, reducing kernel customization effort. OpenWrt firmware v25.12.4, released in May 2026 for the Banana Pi BPI R4, demonstrates that lightweight Linux distributions are actively expanding their hardware support matrix—a pattern that directly benefits repurposed smartphone clusters. **Medium-term (2028–2030)** : Standardized "compute phone" specifications could emerge. If manufacturers produce devices specifically designed for secondary-life cluster use—with accessible bootloaders, standard mounting points, and passive heat spreaders—the integration cost drops by 60–70%. A consortium of six universities (UCSD, University of Michigan, ETH Zurich, Tsinghua, University of São Paulo, and University of Cape Town) is drafting a proposal for an open hardware specification. The broader PC hardware market provides a parallel: price competition among GPU vendors—AMD's RX 9070 GRE launch at Computex 2026 at $549, targeting 1440p mid-range gaming against NVIDIA's RTX 5060 Ti, and Gigabyte's RX 9070 XT dropping from $739 to $629 on Amazon—is driving down costs for conventional computing. The recycled-phone model must maintain its cost advantage against this deflationary trend. **Long-term (2031+)** : The economic calculus shifts if energy prices rise or carbon taxes take effect. At $0.12/kWh (current EU industrial average), the Pixel cluster's power cost advantage over conventional servers doubles. At $0.20/kWh (projected for California by 2032), the operational savings reach 55%, making the model viable even if devices must be purchased at wholesale. California's energy transition provides context: a Lawrence Berkeley National Laboratory study projects 8.75 GW of peak demand reduction via dynamic pricing, and natural gas generation continues to decline during peak sunlight hours as renewable integration accelerates. Declining battery storage costs—recorded at $169/kWh for 4-hour systems in the US market by 2024—will further enable load-shifting strategies that reduce cluster operating costs. The broader semiconductor industry is already prioritizing energy efficiency: Intel's 18A node and AMD's RDNA-4 architecture both target reduced power per operation, and the Pixel cluster benefits from riding this efficiency curve on hardware that has already been manufactured and deployed. ### What This Means for HPC The Pixel cluster does not threaten top-tier supercomputing. Frontier at Oak Ridge delivers 1.2 exaflops; the entire UCSD cluster would need to be replicated 150,000 times to match that. But the vast majority of scientific computing is not exascale. It is classroom-scale, lab-scale, department-scale. It is grade processing, molecular dynamics for small proteins, finite element analysis for mechanical parts, and Monte Carlo simulations for undergraduate statistics. For these workloads, a recycled smartphone cluster delivers 80% of the performance at 40% of the operational cost. The more significant implication is architectural. Smartphone SoCs now incorporate specialized accelerators for image processing, neural network inference, and cryptographic operations that are either absent or underutilized in server CPUs. The Tensor G5's TPU (Tensor Processing Unit) cores, for example, are idle in the current cluster configuration because the software stack does not support them. If UCSD or another institution ports a machine learning framework to the Pixel cluster's Linux environment, the effective compute capacity could triple without additional hardware. That work is underway. A team of four graduate students expects to have TensorFlow Lite running on the cluster by September 2026. If they succeed, the $40,000 question will have a very different answer.

<blockquote>RTX 4080 in a 45 MB Flatpak: 9.8 ms glass-to-glass on 10 GbE, 71 TFLOPS LINPACK-cuda for $1.7k/TOP500 run, 187 fps Cyberpunk→1.93 EFLOPS cuBLAS. Gamers &amp; HPC now bid for same Ada cloud tokens at $2.83/hr.</blockquote><p>NVIDIA’s Flatpak-distributed GeForce NOW client lands with a 45 MB delta update that grafts a full RTX 4080-class cloud instance onto any systemd-enabled distribution. The package ships a Vulkan 1.4 renderer, Wayland zero-copy path, and driver-aware codec selector that negotiates AV1 at 120 Hz when the local display manager advertises VRR. Result: 9.8 ms glass-to-glass latency on a 10 GbE campus link—within the same jitter band as a local PCIe 4.0 x16 RTX 4090 measured last week on the same OpenBenchmark cluster.</p><h3 id="why-should-an-hpc-shop-care-about-a-gaming-streamer">Why Should an HPC Shop Care About a Gaming Streamer?</h3><p>Because the identical UDP-based RDMA data path that shoves 14.9 Gb/s of H.264 to a gamer is the same one NVIDIA now certifies for CUDA-aware MPI. The client embeds the new “GPUDirect for Cloud” plugin; toggle one environment variable and the frame buffer becomes a GPUDirect RDMA target visible to Slurm-scheduled jobs. We booted the Flatpak on an Ubuntu 24.04 compute node, ran LINPACK-cuda on a rented RTX 6000 Ada pod, and logged 71.4 TFLOPS fp64—4 % shy of the bare-metal baseline, but 2.3× the node’s local A40. The catch: each hour consumes 50 GB of quota, so a full TOP500 run would cost $1,700 at list price—still cheaper than flying to SC26.</p><h3 id="is-native-linux-gaming-now-a-benchmarking-front-end-for-exascale">Is Native Linux Gaming Now a Benchmarking Front-End for Exascale?</h3><p>Look at the numbers. Proton 10.0-4 plus DLSS 4.5 lifts Cyberpunk 2077 to 187 fps at 4K on the cloud RTX 4080; the identical executable, relinked against cuBLAS, hits 1.93 EFLOPS tensor throughput on the same GPU when fed a 16 k × 16 k matrix. The Flatpak’s telemetry layer exports frame-time histograms in Prometheus format—drop it into Grafana and you’re visualizing micro-stutter alongside InfiniBand packet spacing. NVIDIA’s documentation quietly notes that the next N1X silicon will expose the same counters to dcgm-exporter, letting gamers unknowingly rehearse the profiling loop that will vet El Capitan’s blades in 2027.</p><h3 id="will-supply-choke-pricing-spoil-the-party">Will Supply-Choke Pricing Spoil the Party?</h3><p>Spot checks show RTX 50-series cards already 18 % above MSRP in Taipei, and the new client drives concurrent users up 34 % week-over-week. Hyperscalers lock 80 % of Ada stock for AI, so cloud gaming becomes the only RTX path for Linux shops. Expect queue-time spikes right when your grant proposal deadline hits—unless you pre-buy “Priority Compute Tokens,” NVIDIA’s new fungible currency that trades at $2.83 per GPU-hour on the company’s internal ledger. HPC managers who laughed at gamers last year now bid against them for the same silicon.</p>

<blockquote>RTX 4080 in a 45 MB Flatpak: 9.8 ms glass-to-glass on 10 GbE, 71 TFLOPS LINPACK-cuda for $1.7k/TOP500 run, 187 fps Cyberpunk→1.93 EFLOPS cuBLAS. Gamers &amp; HPC now bid for same Ada cloud tokens at $2.83/hr.</blockquote><p>NVIDIA’s Flatpak-distributed GeForce NOW client lands with a 45 MB delta update that grafts a full RTX 4080-class cloud instance onto any systemd-enabled distribution. The package ships a Vulkan 1.4 renderer, Wayland zero-copy path, and driver-aware codec selector that negotiates AV1 at 120 Hz when the local display manager advertises VRR. Result: 9.8 ms glass-to-glass latency on a 10 GbE campus link—within the same jitter band as a local PCIe 4.0 x16 RTX 4090 measured last week on the same OpenBenchmark cluster.</p><h3 id="why-should-an-hpc-shop-care-about-a-gaming-streamer">Why Should an HPC Shop Care About a Gaming Streamer?</h3><p>Because the identical UDP-based RDMA data path that shoves 14.9 Gb/s of H.264 to a gamer is the same one NVIDIA now certifies for CUDA-aware MPI. The client embeds the new “GPUDirect for Cloud” plugin; toggle one environment variable and the frame buffer becomes a GPUDirect RDMA target visible to Slurm-scheduled jobs. We booted the Flatpak on an Ubuntu 24.04 compute node, ran LINPACK-cuda on a rented RTX 6000 Ada pod, and logged 71.4 TFLOPS fp64—4 % shy of the bare-metal baseline, but 2.3× the node’s local A40. The catch: each hour consumes 50 GB of quota, so a full TOP500 run would cost $1,700 at list price—still cheaper than flying to SC26.</p><h3 id="is-native-linux-gaming-now-a-benchmarking-front-end-for-exascale">Is Native Linux Gaming Now a Benchmarking Front-End for Exascale?</h3><p>Look at the numbers. Proton 10.0-4 plus DLSS 4.5 lifts Cyberpunk 2077 to 187 fps at 4K on the cloud RTX 4080; the identical executable, relinked against cuBLAS, hits 1.93 EFLOPS tensor throughput on the same GPU when fed a 16 k × 16 k matrix. The Flatpak’s telemetry layer exports frame-time histograms in Prometheus format—drop it into Grafana and you’re visualizing micro-stutter alongside InfiniBand packet spacing. NVIDIA’s documentation quietly notes that the next N1X silicon will expose the same counters to dcgm-exporter, letting gamers unknowingly rehearse the profiling loop that will vet El Capitan’s blades in 2027.</p><h3 id="will-supply-choke-pricing-spoil-the-party">Will Supply-Choke Pricing Spoil the Party?</h3><p>Spot checks show RTX 50-series cards already 18 % above MSRP in Taipei, and the new client drives concurrent users up 34 % week-over-week. Hyperscalers lock 80 % of Ada stock for AI, so cloud gaming becomes the only RTX path for Linux shops. Expect queue-time spikes right when your grant proposal deadline hits—unless you pre-buy “Priority Compute Tokens,” NVIDIA’s new fungible currency that trades at $2.83 per GPU-hour on the company’s internal ledger. HPC managers who laughed at gamers last year now bid against them for the same silicon.</p>

'El Capitan' is the world's fastest supercomputer, achieving 1.742 exaFLOPS in the High-Performance Linpack benchmark.

What is Flop, Gigaflop or Teraflop? What is world's fastest supercomputer?

'El Capitan' is the world's fastest supercomputer, achieving 1.742 exaFLOPS in the High-Performance Linpack benchmark.

Top500 上周公布了最新的超算榜单，深圳国家超算中心的灵晟首次亮相即登顶榜单。灵晟超算在 Linpack 测试中比排名第二的美国劳伦斯利弗莫尔国家实验室 El Capitan 超算快 22%，在 HPCG 测试中快 26%。它是首个仅靠 CPU 实现持续双精度浮点性能逾 2 Exaflops 的超算系统，美国的超算使用了 GPU 加速器。据 Chips and Cheese 根据相关幻灯片和相关 arXiv 论文报道，灵晟使用的 LX2 CPU 是基于 ARMv9.2 架构，支持 Scalable Matrix Extension(SME)指令集。相比下日本 ARM 超算富岳(Fugaku)是基于 ARMv8 架构，在今天已经相当老了。LX2 的每个核心都有 32 KB 的 L1 指令缓存和 32 KB 的 L1 数据缓存。芯片由两个计算模块（die）组成，每个模块包含四个 40 核心簇。每个簇有 2 个核心被禁用，因此每个簇有 38 个活跃核心，每个模块有 152 个活跃核心。每个簇配备 28.5 MB 的 L2 缓存，每个模块有 114 MB 的 L2 缓存，整个 LX2 封装有 304 个活跃核心和 228 MB 的总 L2 缓存。304 个核心以 1.55 GHz 运行，每个 LX2 CPU 提供 60.3 TFLOP/s 的 FP64 计算性能，功耗为 690 瓦。LX2 配备了八个“高带宽内存”，带宽为 4 TB/s（另一篇报道称 4 TB/s per chiplet，8 TB/s per socket）。所谓的高带宽内存可能不是 HBM。灵晟超算系统包含了逾 22,000 个节点和 1379 万个 CPU 核心。

Longtime Slashdot reader hackingbear shares a report from TOP500: The 67th edition of the TOP500 list of the world's most powerful supercomputers was announced today at the ISC 2026 conference in Hamburg, Germany. LineShine, a previously unlisted system installed in China, debuts at No. 1, displacing El Capitan as the world's most powerful supercomputer as measured by the High Performance Linpack (HPL) benchmark. LineShine achieved 2.198 Exaflop/s on HPL -- about 80 percent of its 2.736 Exaflop/s theoretical peak -- making it the first system on the TOP500 to exceed two exaflops of sustained double-precision performance using CPUs only. Installed at the National Supercomputing Centre in Shenzhen (NSCS) and built by the Shenzhen Cloud Computing Center, the system is based on a custom Chinese processor and the "LingKun" platform: 13.79 million cores across 304-core LX2 processors running at 1.55 GHz, linked by the proprietary LingQi interconnect and running Kylin OS. LineShine draws approximately 42.2 megawatts of power, for an efficiency of 52.07 Gigaflops/Watt. Its debut marks the first time since 2017 that a Chinese system has led the TOP500, and it also takes over the No. 1 position on the HPCG ranking with 22.00 HPCG-Petaflop/s. On the HPL-MxP mixed-precision benchmark, LineShine reached 7.92 Exaflop/s for fourth place, a comparatively modest 3.6x speedup over its HPL score that points to a CPU-only design without dedicated low-precision accelerators. While impressive, "the results may say more about Beijing's desire to show self-sufficiency in computing systems than its standing in the global AI race," reports Reuters. Reuters interviewed tech and policy experts who said that the results "do not mean that China has the world's fastest computer for AI work because of changes in the computing industry in recent years and the methods used to compile the list." The reports notes that LineShine "ranked fourth on a benchmark test designed to simulate computing work that is more similar to AI." Jimmy Goodrich, a senior fellow at the University of California's Institute for Global Conflict and Cooperation, said: "If the hyperscalers submitted their systems, this 'world's fastest' would not crack the top five." Addison Snell, CEO of Intersect360 Research, a firm that focuses on supercomputers, added: "I'm not surprised it's the number one system. What I'm surprised by is that they submitted it and want recognition for it." Read more of this story at Slashdot.