SEMIFIVE has announced a significant collaboration with a U.S. firm, securing a $52 million contract that enhances its position in the AI semiconductor market.

Accelerator will be targeted at hyperscalers and CSPs once production begins in 2028

SEMIFIVE has applied for a KOSDAQ listing, aiming to enhance its presence in AI semiconductor design. The IPO allows the company to expand globally while boosting innovation.

SEMIFIVE secures a significant contract to design AI NPUs, enhancing its foothold in the semiconductor market. The project utilizes advanced 4nm tech.

The collaboration between FotoNation and SEMIFIVE aims to drive forward the TriSilica AI chip family, enhancing edge AI applications with cutting-edge technology.

As SEMIFIVE gears up for its IPO, it aims to excel in the AI ASIC market by enhancing design capabilities and securing a global footprint, paving the way for innovative technology solutions.

SEMIFIVE's collaboration with Niobium aims to create a groundbreaking FHE accelerator, paving the way for new AI-driven encrypted computing solutions.

Discover how SEMIFIVE and ICY Tech have successfully tape-out an 8nm eMRAM-based Edge AI SoC, paving the way for innovative applications in edge devices across Asia.

GALWAY: FotoNation has entered a strategic partnership with SEMIFIVE to accelerate the development and commercialisation of the TriSilica artificial intelligence (AI) chip family using fabrication technology from Samsung Foundry. Under the collaboration, SEMIFIVE will lead turnkey development for TriSilica, an ultra-low-power AI chip platform specifically designed for edge AI applications and next-generation intelligent sensor technologies. …

KRW 42.3 billion in mass-production orders in six months. That is nearly double what SEMIFIVE booked in all of last year. The number sits behind a low-key September 8 disclosure: the South Korean design house has started shipping, at volume, a data-center AI inference accelerator built on Samsung Foundry's 4nm process. 🎯 SEMIFIVE has begun mass production of HyperAccel's Bertha, a data-center AI inference accelerator, on Samsung's 4nm node. It is the company's first large-scale run on that process. Bertha is a "Big Die" larger than 500 mm², the size at which power, heat and yield stop being routine problems. A turnkey contract carried it from design to volume. The financials suggest the model is working: first-half mass-production bookings reached KRW 42.3 billion, roughly twice its full-year 2025 total, with Q2 orders up 71% over Q1. HyperAccel is the buyer. Founded in Seoul in 2023, the startup designs what it calls a Language Processing Unit (LPU), silicon tuned for running large language models rather than training them. Bertha is the first of those designs to reach volume. The milestone matters less for a single chip than for what it proves about the layer beneath the AI build-out. Design houses that once sold a one-off engineering project are now selling production. KRW 42.3B H1 2026 orders ↑ 71% Q2 vs Q1 #### Mass-production order intake Bookings from mass-production programs in the first half of 2026. · _Company statements, September 2026_ ## Selling production, not just design The older custom-silicon business ran on non-recurring engineering (NRE). A customer pays a design house to build a chip, the chip tapes out, and the relationship ends. Revenue is lumpy. Nothing compounds. The company's pitch inverts that. It sells a turnkey line running from front-end design and verification through packaging, testing and volume manufacturing supply. When a customer commits to mass production, the design fee becomes an annuity. The company has now done it four times. A security-camera ASIC for Hanwha Vision's Wisenet 9. A high-performance computing chip for a Japanese customer. A server inference accelerator on its 14nm platform. And now Bertha. That stack shows up in the accounts. Its first-half 2026 revenue rose 97% year over year, following a 137% jump in Q1 alone. Order intake is the leading indicator: KRW 15.6 billion in Q1, KRW 26.7 billion in Q2, a 71% step up. Overseas customers took 45% of Q2 bookings. Parameter| Design-only NRE| Turnkey + mass production ---|---|--- **Revenue shape** | ✗ One-time engineering fee | ✔ Design fee plus a production annuity **Duration** | ◐ Ends at tape-out | ✔ Runs through the product's life **Who owns yield risk** | ✗ The customer | ✔ The design house, absorbed in the contract Turnkey model as described by the design house, September 2026 Yield is the part that decides whether this works. A design that boots on a test bench is not a design that can be manufactured at a rate. Someone has to hold the ramp-up risk, and in a turnkey agreement that risk lands on the design house. ## A 500 mm² die is where the yield math turns Die size is the quiet constraint. Bertha's package is a Big Die of more than 500 mm², and defects per wafer scale with area. Power delivery, heat dissipation and yield stop being second-order concerns. On a 4nm node those effects compound, because the transistor density that makes a chip fast also concentrates its heat. The published targets are aggressive. HyperAccel lists the Bertha 500 at 768 trillion operations per second (TFLOPS), 546 GB/s of memory bandwidth, support for 1,024 concurrent inference requests, and roughly 90% hardware utilization. Samsung's process carries the transistor count. SEMIFIVE's job was to make the yield curve hold at volume. That is also why SEMIFIVE's position as a Samsung Advanced Foundry Ecosystem (SAFE) partner matters. Advanced-node capacity is scarce and allocated by relationship as much as by contract. A design house that can move a customer's chip through a leading-edge fab, without the customer owning the fab relationship, is selling access as much as engineering. The path was not quick. The two companies announced their collaboration in January 2024, signed a mass-production contract that October, and aimed for first output in Q1 2026. Actual volume began in September 2026, two quarters late. Slippage of that size on a leading-edge Big Die is ordinary, not alarming. It is also the reason turnkey work commands a premium. ## Inference is where the silicon war moved The broader shift is not subtle. Training a frontier model is a handful of very large jobs. Using one is millions of small ones. Inference, the act of running a trained model, is now the dominant workload, and it stresses different parts of a machine: memory bandwidth, batch throughput, and latency under load. That has pulled custom silicon out of the margins. Meta has moved an accelerator of its own into production. OpenAI has an inference chip in flight. Nvidia, which still owns most of the market, agreed in early September to buy Hugging Face for $12.9 billion, placing the default distribution platform for open models inside the dominant chip vendor. As we wrote in September, inference flipped from an afterthought into the main event. Bertha is a bet on the same premise, executed one layer down: not which model serves the request, but which piece of silicon runs it. HyperAccel raised about $37.7 million in a Series A in December 2024, backed by a roster of Korean institutions including Industrial Bank of Korea, KB Investment and Mirae Asset. Its chief executive, Joo-Young Kim, is a professor at KAIST. The company's earlier pitch claimed up to twice the performance and 19 times the price-performance of a graphics processing unit (GPU). Those are company figures, not audited benchmarks, and volume deployment is where they get tested. > "We are delighted to work with SEMIFIVE, a leading provider of system-on-chip platforms and comprehensive ASIC design solutions, for the development of Bertha to be mass-produced."— Joo-Young Kim, CEO, HyperAccel ### Does the custom-silicon window stay open, or do the buyers take it in-house? 🔮 **By mid-2027, at least one announced Big-Die inference accelerator reaches sustained volume while at least one other slips a full year. The design-house layer grows, but its margins compress as hyperscaler in-house teams mature. Horizon: 2027.** Probability: 55% — demand is real, but advanced-node capacity and yield, not design, remain the binding constraint. #### ✅ Arguments for Turnkey demand already exceeds one customer: its order book spans security, HPC and data-center AI. Inference workloads are multiplying faster than any single chip architecture can cover, which keeps room for specialists. **Confirmation criteria:** a second named hyperscaler or chip startup contracts a design house for a Big-Die ASIC on 4nm or below. #### ❌ Arguments against The largest buyers, Meta, OpenAI and Google, are building in-house teams that do exactly this work. Leading-edge supply is finite, so foundry allocation, not customer demand, may cap the design houses. **Disconfirmation criteria:** a marquee customer pulls a Big-Die program back in-house before volume, or foundry allocation shifts against third-party design houses. ## Development scenarios #### 🟢 Optimistic scenario (30%) Bertha volumes expand on follow-on orders, and it signs two more advanced-node programs within a year. **Implications:** the turnkey ASIC model is validated as a durable revenue layer, and leading-edge design houses get bid up as strategic assets. #### 🟡 Base-case scenario (50%) Bertha ramps steadily but slowly, and growth comes from a wider mix of smaller programs rather than one flagship. **Implications:** revenue keeps compounding at a lower slope; the story stays intact but never becomes a step change. #### 🔴 Pessimistic scenario (20%) Yield on the Big Die stays expensive, follow-on orders thin out, and the next generation moves to a larger buyer's in-house design. **Implications:** the design-house layer re-rates as a services business, with project economics rather than platform economics. 📊 **Key signals to track** Follow-on purchase orders from HyperAccel, the clearest read on whether volume is real. SEMIFIVE's quarterly order intake, which jumped 71% between Q1 and Q2. Whether a second advanced-node turnkey contract is announced. Samsung foundry advanced-node allocation to third-party design houses. SEMIFIVE Commences Mass Production of HyperAccel's LLM AI Inference Accelerator Bertha on Samsung 4nm The primary announcement, including the Big Die detail, the turnkey scope, and the H1 order-intake figures. SEMIFIVE Newsroom The company's own account of the milestone and the financial trajectory behind it. Semifive begins mass production of Samsung 4-nanometer AI inference accelerator Independent Korean trade coverage confirming the volume run and its significance for Samsung's 4nm node. DigitalToday Third-party confirmation that the production run started, and why the node matters. Bertha 500 HyperAccel's product page for the accelerator, with the published performance and memory specifications. HyperAccel The design target the mass-production run now has to meet at scale.

SEMIFIVE has begun mass production of Bertha, a data center AI inference accelerator developed for fellow South Korean company HyperAccel, the custom semiconductor firm announced on September 8, 2026....

SEMIFIVE announced today the mass production of a data center AI inference accelerator for HyperAccel, marking its first large-scale project utilizing Samsung Foundry’s 4nm process node. Following an initial production contract, mass production volumes are projected to expand with follow-on purchase orders aligned with HyperAccel’s rollout.

SEMI FIVE has kicked off the mass production of HyperAccel's AI inference accelerator, 'Bertha,' utilizing Samsung's cutting-edge 4nm process technology, signaling immense growth.

SEMIFIVE has begun mass production of Bertha, a data center AI inference accelerator developed for fellow South Korean company HyperAccel, the custom semiconductor firm announced on September 8, 2026. The chip is manufactured on Samsung Foundry’s 4nm process node and marks SEMIFIVE’s first large-scale mass production project on that advanced node. Following the initial production contract with HyperAccel, mass production volumes are projected to expand steadily through follow-on purchase orders aligned with HyperAccel’s service rollout and expansion, the company said. A Big Die on Samsung’s 4Nm Node Bertha is an accelerator optimized for AI inference workloads, including large language models. It is a “Big Die” measuring more than 500 mm². SEMIFIVE said that as die size increases, managing power consumption, heat dissipation, and manufacturing yield becomes far more challenging, and that it brought the advanced-node project into mass production by delivering a complete turnkey solution spanning front-end design and verification through packaging, testing, and volume manufacturing supply. The design work behind the chip predates this week’s production start. At the Samsung Advanced Foundry Ecosystem Forum 2026 in San Jose, SEMIFIVE said it had successfully executed the comprehensive design and verification process for the Bertha Big Die, exceeding 500 mm², based...

H1 bookings reach KRW 118.9 billion with revenue at KRW 94.7 billion, achieving 78% of full-year 2025 revenue in just six months Expanding ASIC turnkey bookings, accelerating mass production, and recurring IP revenue drive SEMIFIVE's scalable growth SEOUL, South Korea, Aug. 14, 2026 /PRNewswir...

SEMIFIVE showcases incredible growth with a 97% year-over-year revenue increase in H1 2026, fueled by strong ASIC turnkey sales and mass production.

Built a differentiated portfolio and accelerated revenue growth with its independently developed reusable and automated design platform Secured key semiconductor IP and laid the foundation for long-term growth through next-generation technological innovations SEOUL, South Korea, March 26, 2025 ...

SEMIFIVE affiche une croissance de 137 % au T1 2026, portée par la demande mondiale de solutions AI ASIC personnalisées en Amérique du Nord et au Japon.

In the news release, SEMIFIVE and ICY Tech Achieve Successful Tape-out of 8nm eMRAM-Based Edge AI SoC, Targeting First Commercialization in Asia, issued 07-May-2026 by SEMIFIVE over PR Newswire, we are advised by the company that changes have been made. The complete, corrected release follows: SEMIFIVE and ICY Tech Achieve Successful Tape-out of 8nm eMRAM-Based […]

Revenue reached KRW 47.9 billion and new orders totaled KRW 55.4 billion, marking a record-breaking performance and signaling the beginning of full-scale growth. Overseas ASIC development revenue, including North America and Japan, exceeded 60% of total ASIC development revenue, strengthening the global customer base. Q1 mass production orders alone reached nearly 74% of last year’s […]

– Demonstrates end-to-end expertise in high-performance custom chip design for AI and HPC– Establishes a subsidiary in Japan to strengthen global reach SEOUL, South Korea, Dec. 12, 2025 /PRNewswire/ — SEMIFIVE, a global leader in custom AI semiconductor (ASIC) design preparing for its KOSDAQ listing, announced today that it has secured multiple AI semiconductor design […]

FotoNation Ltd., a Galway, Ireland-based perception recognition company, and SEMIFIVE Inc., a leading global provider of custom AI semiconductor solutions, announced a strategic collaboration agreement under which SEMIFIVE will lead turnkey development for TriSilica, FotoNation’s ultra-low-power perceptual AI chip family. TriSilica is an ultra-low-power, compact-footprint perceptual AI silicon platform designed to support multimodal sensor inputs, including audio, mmWave, spectral, infrared, and RGB. “FotoNation is a pioneer in in-device computational imaging solutions, and its Vision AI technology is redefining what is possible at the edge,” said Brandon Cho, CEO and co-founder of SEMIFIVE.

Yesterday, Arm has announced significant progress in its Total Design initiative. The program, launched a year ago, aims to accelerate the development of custom silicon for data centers by fostering collaboration among industry partners. The ecosystem has now grown to include nearly 30 participating companies, with recent additions such as Alcor Micro, Egis, PUF Security, and SEMIFIVE. A notable development is a partnership between Arm, Samsung Foundry, ADTechnology, and Rebellions to create an AI CPU chiplet platform. This collaboration aims to deliver a solution for cloud, HPC, and AI/ML workloads, combining Rebellions' AI accelerator with ADTechnology's compute chiplet, implemented using Samsung Foundry's 2 nm Gate-All-Around (GAA) FET technology. The platform is expected to offer significant efficiency gains for generative AI workloads, with estimates suggesting a 2-3x improvement over the standard CPU design for LLMs like Llama3.1 with 405 billion parameters. Arm's approach emphasizes the importance of CPU compute in supporting the complete AI stack, including data pre-processing, orchestration, and advanced techniques like Retrieval-augmented Generation (RAG). The company's Compute Subsystems (CSS) are designed to address these requirements, providing a foundation for partners to build diverse chiplet solutions. Several companies, including Alcor Micro and Alphawave, have already announced plans to develop CSS-powered chiplets for various AI and high-performance computing applications. The initiative also focuses on software readiness, ensuring that major frameworks and operating systems are compatible with Arm-based systems. Recent efforts include the introduction of Arm Kleidi technology, which optimizes CPU-based inference for open-source projects like PyTorch and Llama.cpp. Notably, as Google claims, most AI workloads are being inferenced on CPUs, so creating the most efficient and most performant CPUs for AI makes a lot of sense.

투자자들 사이에서 큰 관심을 받고 있는 종목 중 하나가 바로 AI 반도체 분야의 기업, ‘세미파이브(SemiFive)’입니다. 인공지능과 고성능 반도체 설계 산업이 급속히 성장하는 지금, 이 회사의 상장 소식은 많은 기대를 모으고 있습니다. 이번 글에서는 상장 일정과 청약 신청 방법에 대해 정리해 보겠습니다. 세미파이브 공모주 개요 👉 세미파이브 공모주 청약하기 이번 기업공개에서 모집되는 물량은 총 540만 주로, 모두 신주로 이루어져 있습니다. 대표 주관사는 삼성증권과 UBS증권(서울지점) 두 곳이지만, 일반 투자자들이 청약할 수 있는 곳은 삼성증권뿐라는 점을 잊지 말아야 합니다.