How do we achieve energy-efficient edge AI? Shift away from traditional architectures. 🧠
New paper in IEEE SSC-L from @GeorgiaTech demonstrates a 28-nm FeFET Compute-in-Memory macro hitting a peak efficiency of 346.6 TOPS/W.
Read: https://bit.ly/4yAKqQ2
#IEEESSCS #SSCLetters
New paper in IEEE SSC-L from @GeorgiaTech demonstrates a 28-nm FeFET Compute-in-Memory macro hitting a peak efficiency of 346.6 TOPS/W.
Read: https://bit.ly/4yAKqQ2
#IEEESSCS #SSCLetters
July 23, 2026 at 8:54 PM
How do we achieve energy-efficient edge AI? Shift away from traditional architectures. 🧠
New paper in IEEE SSC-L from @GeorgiaTech demonstrates a 28-nm FeFET Compute-in-Memory macro hitting a peak efficiency of 346.6 TOPS/W.
Read: https://bit.ly/4yAKqQ2
#IEEESSCS #SSCLetters
New paper in IEEE SSC-L from @GeorgiaTech demonstrates a 28-nm FeFET Compute-in-Memory macro hitting a peak efficiency of 346.6 TOPS/W.
Read: https://bit.ly/4yAKqQ2
#IEEESSCS #SSCLetters
New from SSC-Letters: A multi-band sub-GHz IoT transceiver that cuts wake-up power to just 6.7 μW! 📡🔋
Despite the ultra-low-power envelope, it achieves -125 dBm sensitivity and 40.9% TX efficiency in 55nm CMOS.
Read here: https://bit.ly/4gDOKY7
#IEEESSCS #SSCLetters #IoT
Despite the ultra-low-power envelope, it achieves -125 dBm sensitivity and 40.9% TX efficiency in 55nm CMOS.
Read here: https://bit.ly/4gDOKY7
#IEEESSCS #SSCLetters #IoT
July 21, 2026 at 7:04 PM
New from SSC-Letters: A multi-band sub-GHz IoT transceiver that cuts wake-up power to just 6.7 μW! 📡🔋
Despite the ultra-low-power envelope, it achieves -125 dBm sensitivity and 40.9% TX efficiency in 55nm CMOS.
Read here: https://bit.ly/4gDOKY7
#IEEESSCS #SSCLetters #IoT
Despite the ultra-low-power envelope, it achieves -125 dBm sensitivity and 40.9% TX efficiency in 55nm CMOS.
Read here: https://bit.ly/4gDOKY7
#IEEESSCS #SSCLetters #IoT