#Zen4c
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rootnationua.bsky.social
Представлено процесори Ryzen 5 7545U і Ryzen 3 7440U з ядрами Zen4c root-nation.com/ua/news-ua/i...
November 3, 2023 at 4:07 PM
instlatx64.bsky.social
New CPUID dump:
-- 128-Core #AMD #EPYC 9754 ( #Bergamo top-SKU, #Zen4c) AA0F02
New Intel codenames:
- #Dunlow (LGA1954 entry server [1])
- #TitanLake, #HammerLake [2]
- LGA1954 socket info #NovaLake, #RazorLake [2]
#AMD #Venice info:
- B50F00, B90F00 = Dense
- BA0F00, BC0F00 = Classic
1/2
February 8, 2026 at 9:27 AM
instlatx64.bsky.social
Github:
github.com/InstLatx64/I...
Sources:
[1]: x.com/x86deadandba...
[2]: www.youtube.com/watch?v=bO5g...
2/2
128-Core AMD EPYC 9754 (Bergamo, Zen4c) AA0F02 CPUID dump · InstLatx64/InstLatx64@35e0064
-- 128-Core AMD EPYC 9754 (Bergamo, Zen4c) AA0F02 CPUID dump added -- AMD Venice CPUID B50F00, B90F00 Dense info added -- AMD Venice CPUID BA0F00, BC0F00 Classic info added -- Intel Dunlow codename...
github.com
February 8, 2026 at 9:28 AM
conocojoe3000.bsky.social
Intel. Their different cores (P/E) pose scheduling problems due to their different instruction sets. Not unsolvable, but relies on scheduling to be clever and aware. Allegedly those scheduling teething problems are solved...but...are they?
On AMD "Zen4/5" and "Zen4c/5c" cores have the same
January 9, 2025 at 8:18 PM
tweakers.net
AMD belooft transparanter te zijn over of Ryzen-processor Zen 4c-cores bevat
AMD belooft transparanter te zijn over of Ryzen-processor Zen 4c-cores bevat
AMD belooft dat het binnenkort transparanter aan gaat geven of een processor gebruikmaakt van Zen 4c-cores. Tot dusver werden de Zen4- en Zen4c-cores vaak bij elkaar opgeteld, waardoor het niet duidelijk was hoeveel er van ieder aanwezig zijn.
tweakers.net
December 24, 2023 at 11:54 AM
wild-c.bsky.social
If Zen4c does only cut the L3 per Core in half, then the die size of the 16C CCD would probably be ~100-110mm² when you take into account other cuts (PS5-like FPU downgrade, smaller L2, etc.)

Wonder if it could fit on the Raphael Substrate 🤔
November 23, 2024 at 12:40 PM
jauntywunderkind.bsky.social
You can pay +$200 for a 8224p with half the cores, 24 of 48. The Milan zen3 -> Genoa Zen4c jump has PCIe 5.0! Probably some better behaved power & other nice features. But losing half the cores! Yikes. For more money!
April 12, 2025 at 10:45 PM
jauntywunderkind.bsky.social
instead of the reduced zen4c genoa dense zen4c, one can get regular 16-core 9124 zen4 for $1200. more cache, all 128 lanes of pcie, and oh man 12-channels DDR5-4800 zoom zoom zoom.

double your memory bandwidth & capacity! but what a price jump, beyond many mere portals acquireability.
March 9, 2025 at 12:03 AM
jauntywunderkind.bsky.social
that's a 8-channel DDR4-3200, 128 lane pcie 4.0 part.

next generation up, there's a 8124P for $700. a 16c zen4c part. six-channels DDR5-4800 has similar throughput, probably lower mem capacity. 96 lanes PCIe 5.0, for those with faster cards.
March 8, 2025 at 11:59 PM
rsspost.bsky.social
4GAMER : https://www.4gamer.net/games/612/G061273/20231101067/
低消費電力時に速い「Zen 4c」コア採用のノートPC向け「Ryzen 5 7545U」をAMDが発表。エントリー市場向けPCに切り込む
低消費電力時に速い「Zen 4c」コア採用のノートPC向け「Ryzen 5 7545U」をAMDが発表。エントリー市場向けPCに切り込む
2023年11月2日，AMDは，Zen4世代をベースとしながら，低消費電力向けに最適化した「Zen4c」と呼ばれる新型CPUコアを採用するCPU「Ryzen57545U」など計2製品を発表した。低めの動作クロック時に高性能という異色のCPUで，AMDは，苦手としていたエントリー市場向けノートPCに切り込む。
www.4gamer.net
November 2, 2023 at 1:30 PM
tron-gf.bsky.social
She's like a Zen4 core and I'm a Zen4c.
October 13, 2023 at 8:25 PM
instlatx64.bsky.social
If the CCD of #Zen6 #Threadripper is
- classic, like in #Zen4 and #Zen5, then the maximum number of cores is only 4x12=48;
- dense, then the number of cores can be 128, but with a frequency limit, like in #Zen4c (~3.1 GHz) and #Zen5c (~3.7 GHz);
November 24, 2025 at 3:12 PM
instlatx64.bsky.social
#AMD refreshed the "Revision Guide for AMD Family 19h Models A0h-AFh Processors" 57926 to v1.05 pdf
( #Bergamo #Zen4c A0 CPUID AA0F02 #EPYC )
docs.amd.com/v/u/en-US/57...
November 14, 2025 at 2:15 PM
community.amd.com.web.brid.gy
Cannot distinguish the little/big(Zen4/Zen4c) core on Ryzen 5 8500G by cpuid
Hi, I want to distinguish the little/big(Zen4/Zen4c) cores on Ryzen 5 8500G by using cpuid instruction in C++ library. According to "AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions", "E.4.24 Function 8000_0026—Extended CPU Topology", I should be able to distinguish it by CPUID Fn8000_0026, however, it didn't work. This is what I got on my machine by using function "0x80000026" on all the cores: _**CPUID Fn8000_0026_EAX_n[0]: 0x1          **_<----------- bits[30] is HeterogeneousCores should be 1 on a hybrid CPU, but now it's 0. _**CPUID Fn8000_0026_EBX_n[0]: 0x2**_ _**CPUID Fn8000_0026_ECX_n[0]: 0x100      **_<------------bits[8-15] is LevelType -> 0x1(Core). _**CPUID Fn8000_0026_EDX_n[0]: 0x0~0xb**_        <-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[1]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[1]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[1]: 0x201**_ _**CPUID Fn8000_0026_EDX_n[1]: 0x0~0xb    **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[2]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[2]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[2]: 0x302**_ _**CPUID Fn8000_0026_EDX_n[2]: 0x0~0xb       **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[3]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[3]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[3]: 0x403**_ _**CPUID Fn8000_0026_EDX_n[3]: 0x0~0xb       **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[4]: 0x0**_ _**CPUID Fn8000_0026_EBX_n[4]: 0x0**_ _**CPUID Fn8000_0026_ECX_n[4]: 0x0            **_<------- LevelType is zero, stop increasing subfunction number _**CPUID Fn8000_0026_EDX_n[4]: 0x0 **_ BTW, I also tried to distinguish the little/big cores by using Windows' API GetSystemCpuSetInformation and checking the CpuSet.EfficiencyClass, sadly it didn't work neither. On a Intel's hybrid CPU machine(Arrow Lake) , both cpuid and GetSystemCpuSetInformation works well. Do you have any advice on it? Thanks, Leo
community.amd.com
December 2, 2024 at 5:26 PM
community.amd.com.web.brid.gy
Cannot distinguish the little/big(Zen4/Zen4c) core on Ryzen 5 8500G by cpuid
Hi, I want to distinguish the little/big(Zen4/Zen4c) cores on Ryzen 5 8500G by using cpuid instruction in C++ library. According to "AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions", "E.4.24 Function 8000_0026—Extended CPU Topology", I should be able to distinguish it by CPUID Fn8000_0026, however, it didn't work. This is what I got on my machine by using function "0x80000026" on all the cores: _**CPUID Fn8000_0026_EAX_n[0]: 0x1          **_<----------- bits[30] is HeterogeneousCores should be 1 on a hybrid CPU, but now it's 0. _**CPUID Fn8000_0026_EBX_n[0]: 0x2**_ _**CPUID Fn8000_0026_ECX_n[0]: 0x100      **_<------------bits[8-15] is LevelType -> 0x1(Core). _**CPUID Fn8000_0026_EDX_n[0]: 0x0~0xb**_        <-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[1]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[1]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[1]: 0x201**_ _**CPUID Fn8000_0026_EDX_n[1]: 0x0~0xb    **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[2]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[2]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[2]: 0x302**_ _**CPUID Fn8000_0026_EDX_n[2]: 0x0~0xb       **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[3]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[3]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[3]: 0x403**_ _**CPUID Fn8000_0026_EDX_n[3]: 0x0~0xb       **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[4]: 0x0**_ _**CPUID Fn8000_0026_EBX_n[4]: 0x0**_ _**CPUID Fn8000_0026_ECX_n[4]: 0x0            **_<------- LevelType is zero, stop increasing subfunction number _**CPUID Fn8000_0026_EDX_n[4]: 0x0 **_ BTW, I also tried to distinguish the little/big cores by using Windows' API GetSystemCpuSetInformation and checking the CpuSet.EfficiencyClass, sadly it didn't work neither. On a Intel's hybrid CPU machine(Arrow Lake) , both cpuid and GetSystemCpuSetInformation works well. Do you have any advice on it? Thanks, Leo
community.amd.com
December 2, 2024 at 5:26 PM
community.amd.com.web.brid.gy
Cannot distinguish the little/big(Zen4/Zen4c) core on Ryzen 5 8500G by cpuid
Hi, I'm trying to distinguish the little/big(Zen4/Zen4c) cores on Ryzen 5 8500G by using cpuid instruction. According to "AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions", "E.4.24 Function 8000_0026—Extended CPU Topology", I should be able to distinguish it by CPUID Fn8000_0026, however, it didn't work. This is what I got on my machine by using function "0x80000026" on all the cores: _**CPUID Fn8000_0026_EAX_n[0]: 0x1          **_<----------- bits[30] is HeterogeneousCores should be 1 on a hybrid CPU, but now it's 0. _**CPUID Fn8000_0026_EBX_n[0]: 0x2**_ _**CPUID Fn8000_0026_ECX_n[0]: 0x100      **_<------------bits[8-15] is LevelType -> 0x1(Core). _**CPUID Fn8000_0026_EDX_n[0]: 0x0~0xb**_        <-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[1]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[1]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[1]: 0x201**_ _**CPUID Fn8000_0026_EDX_n[1]: 0x0~0xb    **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[2]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[2]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[2]: 0x302**_ _**CPUID Fn8000_0026_EDX_n[2]: 0x0~0xb       **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[3]: 0x4**_ _**CPUID Fn8000_0026_EBX_n[3]: 0xc**_ _**CPUID Fn8000_0026_ECX_n[3]: 0x403**_ _**CPUID Fn8000_0026_EDX_n[3]: 0x0~0xb       **_<-------------this value varies on different cores, from 0 ~ 0xb, which is correct _**CPUID Fn8000_0026_EAX_n[4]: 0x0**_ _**CPUID Fn8000_0026_EBX_n[4]: 0x0**_ _**CPUID Fn8000_0026_ECX_n[4]: 0x0            **_<------- LevelType is zero, stop increasing subfunction number _**CPUID Fn8000_0026_EDX_n[4]: 0x0 **_ BTW, I also tried to distinguish the little/big cores by using Windows' API GetSystemCpuSetInformation and checking the CpuSet.EfficiencyClass, sadly it didn't work neither. On a Intel's hybrid CPU machine(Arrow Lake) , GetSystemCpuSetInformation works well. Do you have any advice on it? Thanks, Leo
community.amd.com
November 28, 2024 at 6:27 PM
presseportal.de.web.brid.gy
AEWIN stellt auf Embedded World 2025 Edge-Computing-Server mit hoher Leistungsdichte vor
AEWIN Tech.: Taipeh, 7. März 2025 (ots/PRNewswire) - AEWIN freut sich, den BAS-6101A, einen Edge-Computing-Server mit hoher Leistungsdichte, der von einem einzelnen AMD Zen5/Zen4c/Zen4 EPYC-Prozessor angetrieben wird, am Stand von DFI auf der Embedded World ...
www.presseportal.de
March 7, 2025 at 8:03 PM
omlt.bsky.social
Cette histoire décevante chez AyaNeo me fait penser

Hey AMD,

What the fuck happened to Mendocino ?

😠😠😠

Et on a clairement besoin d'un Mendocino Next

(Genre 2 Zen4c, et 4CU RDNA3, ou même RDNA 3.5 hein, merci bien)

Hop, tu fous ça dans une SteamDeck Mini et tous les indés de la terre nickel 👍
January 12, 2024 at 9:47 PM