AMD, the AMD Arrow logo, Alveo, Artix, Athlon, EPYC, FidelityFX, Instinct, Kintex, Kria, Radeon, Radeon PRO, RDNA, Ryzen, Smart Access Memory, Spartan, Threadripper, Threadripper PRO, Versal, Vitis, Virtex, Vivado, Zynq and combinations thereof are trademarks of Advanced Micro Devices, Inc.
November 7, 2024 at 9:28 PM
AMD, the AMD Arrow logo, Alveo, Artix, Athlon, EPYC, FidelityFX, Instinct, Kintex, Kria, Radeon, Radeon PRO, RDNA, Ryzen, Smart Access Memory, Spartan, Threadripper, Threadripper PRO, Versal, Vitis, Virtex, Vivado, Zynq and combinations thereof are trademarks of Advanced Micro Devices, Inc.
I'm torn: buy a European Zynq FPGA dev board where the examples are in VHDL or buy a Chinese Zynq FPGA dev board where the documentation is in Mandarin? I think my chances are better with the Mandarin. 😂
January 23, 2025 at 7:53 PM
I'm torn: buy a European Zynq FPGA dev board where the examples are in VHDL or buy a Chinese Zynq FPGA dev board where the documentation is in Mandarin? I think my chances are better with the Mandarin. 😂
new hardware saturday.
April 13, 2024 at 8:48 PM
new hardware saturday.
Hocheffizient ist der Dual-Core Cortex A9 jetzt auch nicht unbedingt. Der Zynq Z020 ist einer der kleineren aus der Zynq - Reihe.
July 24, 2026 at 7:09 AM
Hocheffizient ist der Dual-Core Cortex A9 jetzt auch nicht unbedingt. Der Zynq Z020 ist einer der kleineren aus der Zynq - Reihe.
Building a Custom Zynq-7000 SoC Development Board from the Ground Up
Building a Custom Zynq-7000 SoC Development Board from the Ground Up
In this series of 23 YouTube videos [Rich] puts the AMD Zynq-7000 SoC through its paces by building a development board from the ground up to host it along with …read more
hackaday.com
April 20, 2025 at 11:30 AM
Building a Custom Zynq-7000 SoC Development Board from the Ground Up
Tykkään! AD9361, Zynq 7020 ja jopa 56MHz leveys USB3/GigE. Boottaa kiltisti sdkortilta, jonka kautta voi myös päivittää firmwarea ssh:lla. 70MHz-6GHz.
May 26, 2025 at 8:42 PM
Tykkään! AD9361, Zynq 7020 ja jopa 56MHz leveys USB3/GigE. Boottaa kiltisti sdkortilta, jonka kautta voi myös päivittää firmwarea ssh:lla. 70MHz-6GHz.
Three blog posts in one week?! It's almost like I am getting increasingly desperate to get the tutorial stuff out of the way...
fpga.maisonikkoku.com/2024/12/21/c...
fpga.maisonikkoku.com/2024/12/21/c...
COMMAND BUFFERS (and Zynq setup) PART 1 – FPGA GPU and Retro Console Blog
fpga.maisonikkoku.com
December 21, 2024 at 1:24 PM
Three blog posts in one week?! It's almost like I am getting increasingly desperate to get the tutorial stuff out of the way...
fpga.maisonikkoku.com/2024/12/21/c...
fpga.maisonikkoku.com/2024/12/21/c...
Building a Custom Zynq-7000 SoC Development Board from the Ground Up
Building a Custom Zynq-7000 SoC Development Board from the Ground Up
Hackaday Article
hackaday.com
April 20, 2025 at 11:07 AM
Building a Custom Zynq-7000 SoC Development Board from the Ground Up
Want to implement an LLM at the edge, without the need for a GPU? Adam Taylor shows how to deploy a DeepSeek model on the Tria ZUBoard 1CG's AMD Zynq UltraScale+ Processing System.
DeepSeek On the ZUBoard
An engaging project that deploys the smallest DeepSeek model on the AMD Zynq™ UltraScale+™ MPSoC Processing System. By Adam Taylor.
www.hackster.io
May 1, 2025 at 12:35 PM
Want to implement an LLM at the edge, without the need for a GPU? Adam Taylor shows how to deploy a DeepSeek model on the Tria ZUBoard 1CG's AMD Zynq UltraScale+ Processing System.
Look at that, 10 PRs, all without the need for any LLM garbage,
It's just that easy,
It's just that easy,
August 7, 2026 at 9:12 AM
Look at that, 10 PRs, all without the need for any LLM garbage,
It's just that easy,
It's just that easy,
Here are the current specs:
- 11MP Kodak CCD full frame (36mm x 24mm) sensor
- 30MS/s ADC x2
- Zynq 7010 ARM + FPGA SoC
- 512MB DDR3
- 3.4" 480x480 MIPI-DSI LCD up to 1000nits
- 6Wh battery
- Paw-shaped button layout
- Compatible with manual E-mount lenses
These probably will change in the future
- 11MP Kodak CCD full frame (36mm x 24mm) sensor
- 30MS/s ADC x2
- Zynq 7010 ARM + FPGA SoC
- 512MB DDR3
- 3.4" 480x480 MIPI-DSI LCD up to 1000nits
- 6Wh battery
- Paw-shaped button layout
- Compatible with manual E-mount lenses
These probably will change in the future
October 20, 2024 at 11:26 PM
Here are the current specs:
- 11MP Kodak CCD full frame (36mm x 24mm) sensor
- 30MS/s ADC x2
- Zynq 7010 ARM + FPGA SoC
- 512MB DDR3
- 3.4" 480x480 MIPI-DSI LCD up to 1000nits
- 6Wh battery
- Paw-shaped button layout
- Compatible with manual E-mount lenses
These probably will change in the future
- 11MP Kodak CCD full frame (36mm x 24mm) sensor
- 30MS/s ADC x2
- Zynq 7010 ARM + FPGA SoC
- 512MB DDR3
- 3.4" 480x480 MIPI-DSI LCD up to 1000nits
- 6Wh battery
- Paw-shaped button layout
- Compatible with manual E-mount lenses
These probably will change in the future
Fun fact:
The Xilinx Zynq 7000 ARM code HDL module is called the `PS7`, so it makes sense that the Zynq US+ one is the `PS8`.
Then along comes the Versal Gen 1 parts, and they have pretty huge SoC complexes, those are all `PS9`, so far so good, right?
The Xilinx Zynq 7000 ARM code HDL module is called the `PS7`, so it makes sense that the Zynq US+ one is the `PS8`.
Then along comes the Versal Gen 1 parts, and they have pretty huge SoC complexes, those are all `PS9`, so far so good, right?
August 12, 2026 at 3:19 AM
Fun fact:
The Xilinx Zynq 7000 ARM code HDL module is called the `PS7`, so it makes sense that the Zynq US+ one is the `PS8`.
Then along comes the Versal Gen 1 parts, and they have pretty huge SoC complexes, those are all `PS9`, so far so good, right?
The Xilinx Zynq 7000 ARM code HDL module is called the `PS7`, so it makes sense that the Zynq US+ one is the `PS8`.
Then along comes the Versal Gen 1 parts, and they have pretty huge SoC complexes, those are all `PS9`, so far so good, right?
Mostafa Darvishi: GRACIDIT: Graph-Circuit Digital Twin for Configuration-Induced Routing Delay Prediction in Zynq UltraScale+ FPGAs https://arxiv.org/abs/2609.30534 https://arxiv.org/pdf/2609.30534 https://arxiv.org/html/2609.30534
September 28, 2026 at 6:46 AM
Mostafa Darvishi: GRACIDIT: Graph-Circuit Digital Twin for Configuration-Induced Routing Delay Prediction in Zynq UltraScale+ FPGAs https://arxiv.org/abs/2609.30534 https://arxiv.org/pdf/2609.30534 https://arxiv.org/html/2609.30534
Mostafa Darvishi: From Routing Delay Shifts to Silent Data Corruption: Neutron-Induced SEU Effects in AXI-Based Zynq UltraScale+ MPSoCs https://arxiv.org/abs/2609.30538 https://arxiv.org/pdf/2609.30538 https://arxiv.org/html/2609.30538
September 28, 2026 at 6:46 AM
Mostafa Darvishi: From Routing Delay Shifts to Silent Data Corruption: Neutron-Induced SEU Effects in AXI-Based Zynq UltraScale+ MPSoCs https://arxiv.org/abs/2609.30538 https://arxiv.org/pdf/2609.30538 https://arxiv.org/html/2609.30538
AMD впроваджує Zynq та Artix в оновлену систему LiDAR від Sony Semiconductor Solutions https://root-nation.com/ua/news-ua/it-news-ua/ua-amd-adds-zynq-and-artix-to-sony-s-lidar-system/?utm_source=dlvr.it&utm_medium=bluesky #НовиниIT #AMD #Sony #Новини #ШтучнийІнтелект
March 22, 2024 at 3:44 PM
AMD впроваджує Zynq та Artix в оновлену систему LiDAR від Sony Semiconductor Solutions https://root-nation.com/ua/news-ua/it-news-ua/ua-amd-adds-zynq-and-artix-to-sony-s-lidar-system/?utm_source=dlvr.it&utm_medium=bluesky #НовиниIT #AMD #Sony #Новини #ШтучнийІнтелект
Tässä on ollut nopeaa kehitystä, itselläkin taitaa olla jo viisi purkkia github.com/F5OEO/tezuka...
GitHub - F5OEO/tezuka_fw: Universal Zynq/AD9363 firmware builder
Universal Zynq/AD9363 firmware builder. Contribute to F5OEO/tezuka_fw development by creating an account on GitHub.
github.com
February 11, 2026 at 12:55 PM
Tässä on ollut nopeaa kehitystä, itselläkin taitaa olla jo viisi purkkia github.com/F5OEO/tezuka...
Mario Bergeron explores how to add support for the open source LIBCAMERA project on Avnet's Zynq UltraScale+ platform.
RPI Camera Fun with Zynq-UltraScale+ : LIBCAMERA
This project explores how to add support for the open-source LIBCAMERA project on our Zynq-UltraScale+ platform. By Mario Bergeron.
www.hackster.io
February 3, 2025 at 3:35 PM
Mario Bergeron explores how to add support for the open source LIBCAMERA project on Avnet's Zynq UltraScale+ platform.
単発記事
news.mynavi.jp/techplus/art...
ここまでRAMやMemory増やすと、そろそろProcessorも欲しくなってくる感じだが、そうなるとZynqじゃんという話になる訳で、次はZynq Ultrascale+ Gen2が出るのかな？と妄想
news.mynavi.jp/techplus/art...
ここまでRAMやMemory増やすと、そろそろProcessorも欲しくなってくる感じだが、そうなるとZynqじゃんという話になる訳で、次はZynq Ultrascale+ Gen2が出るのかな？と妄想
AMD、Kintex FPGAの新シリーズ「Kintex UltraScale+ Gen 2」を発表
AMDはスペイン・バロセロナで2月3日～2月6日に掛けて開催される「Integrated Systems Europe 2026」にて、Kintex FPGAの新シリーズとしてKintex UltraScale+ Gen 2を発表した。
news.mynavi.jp
February 4, 2026 at 9:27 AM
単発記事
news.mynavi.jp/techplus/art...
ここまでRAMやMemory増やすと、そろそろProcessorも欲しくなってくる感じだが、そうなるとZynqじゃんという話になる訳で、次はZynq Ultrascale+ Gen2が出るのかな？と妄想
news.mynavi.jp/techplus/art...
ここまでRAMやMemory増やすと、そろそろProcessorも欲しくなってくる感じだが、そうなるとZynqじゃんという話になる訳で、次はZynq Ultrascale+ Gen2が出るのかな？と妄想
The final tutorial: using Vitis to write the software side
fpga.maisonikkoku.com/2024/12/25/c...
With this out of the way, there are no more tutorials, no more explaining Vivado/Vitis/AXI, only pure 100% uncut FPGA GPU fun
fpga.maisonikkoku.com/2024/12/25/c...
With this out of the way, there are no more tutorials, no more explaining Vivado/Vitis/AXI, only pure 100% uncut FPGA GPU fun
COMMAND BUFFERS (and Zynq setup) PART 2 – FPGA GPU and Retro Console Blog
fpga.maisonikkoku.com
December 25, 2024 at 1:34 AM
The final tutorial: using Vitis to write the software side
fpga.maisonikkoku.com/2024/12/25/c...
With this out of the way, there are no more tutorials, no more explaining Vivado/Vitis/AXI, only pure 100% uncut FPGA GPU fun
fpga.maisonikkoku.com/2024/12/25/c...
With this out of the way, there are no more tutorials, no more explaining Vivado/Vitis/AXI, only pure 100% uncut FPGA GPU fun
Hey, anyone with access to a relatively recent Zynq US+ (MPSoC or RFSoC, doesn't matter) mind doing a USB capture of the traffic to the FTDI cable when attaching it in Vivado, and also try to dump the scanchain in openocd/bmda?
March 31, 2025 at 6:23 AM
Hey, anyone with access to a relatively recent Zynq US+ (MPSoC or RFSoC, doesn't matter) mind doing a USB capture of the traffic to the FTDI cable when attaching it in Vivado, and also try to dump the scanchain in openocd/bmda?
I wonder how painful it would be to hack together an embassy-rs HAL for the Zynq 7000,
March 17, 2025 at 12:46 AM
I wonder how painful it would be to hack together an embassy-rs HAL for the Zynq 7000,
Generating these signals can be a bit tricky on a general purpose microcontroller (but possible), I decided to just go with an FPGA. The particular FPGA I picked is the Xilinx Zynq 7010, with dual-core ARM Cortex-A9 processor and ~28K logic cells for me to use.
October 21, 2024 at 1:05 AM
Generating these signals can be a bit tricky on a general purpose microcontroller (but possible), I decided to just go with an FPGA. The particular FPGA I picked is the Xilinx Zynq 7010, with dual-core ARM Cortex-A9 processor and ~28K logic cells for me to use.
what if I got that one particular bootleg zynq 7000 "development board" (probably recycled electronics out of another device)
December 11, 2024 at 6:15 AM
what if I got that one particular bootleg zynq 7000 "development board" (probably recycled electronics out of another device)
The main board has a lot going on, looks like the main player is a Xilinx Zynq 7000-series processor. A dual core Arm chip! There is also 128mb external flash memory, and some ram that I wasn't able to determine the size of.
July 21, 2025 at 1:30 AM
The main board has a lot going on, looks like the main player is a Xilinx Zynq 7000-series processor. A dual core Arm chip! There is also 128mb external flash memory, and some ram that I wasn't able to determine the size of.
We want to show off our in-lab FPGA hardware:
- 8 PYNQ Boards with Xilinx Zynq-7000s
- 4 Xilinx ZCU102 Dev Boards
- 3 Raspberry Pis
All networked together so we can do multi-FPGA system experiments as well as allow remote access for our FPGA/HLS course and grad students.
#FPGA #Xilinx #comparch
- 8 PYNQ Boards with Xilinx Zynq-7000s
- 4 Xilinx ZCU102 Dev Boards
- 3 Raspberry Pis
All networked together so we can do multi-FPGA system experiments as well as allow remote access for our FPGA/HLS course and grad students.
#FPGA #Xilinx #comparch
November 14, 2024 at 6:29 PM