#bswap
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that-1-photo-guy.bsky.social
#EKhatch #automotivephotography, #carphotographer, #carphotography #civichatchback #ekcivic #hatchback #hondacivic #alabamaphotography #alabamaphotographer
#bswap #stancenation #jdmlegends #photography #carswithoutlimits #carspotter #naturallightphotography #alabamacarscene
March 11, 2025 at 8:02 PM
instlatx64.bsky.social
Nanosurprise in #Intel #APX: EVEX encoded reg->reg MOVBE means non-destructive BSWAP!
January 3, 2025 at 5:01 PM
sewer56.dev
We should be glad x86 has the 'bswap' instruction; it's being really, really useful here; performance wise.
March 5, 2025 at 12:02 AM
knightreal.bsky.social
@bloodstuck.bsky.social i need to hug bswap nepeta she looks so nice <3
November 18, 2024 at 11:42 AM
radfordhound.bsky.social
On x86 there's a "bswap" instruction that just reverses the bytes in a register.

All good compilers have an intrinsic to use this instruction.

MSVC's intrinsic (_byteswap_ulong) is different in that it's not marked constexpr. :(

std::byteswap is constexpr though.

So this is how they implement it
A screenshot of C++ code, reading as follows: _NODISCARD constexpr unsigned long _Byteswap_ulong(const unsigned long _Val) noexcept { if (_STD is_constant_evaluated()) { return (_Val << 24) | ((_Val << 8) & 0x00FF'0000) | ((_Val >> 8) & 0x0000'FF00) | (_Val >> 24); } else { return _byteswap_ulong(_Val); } }
November 21, 2024 at 10:31 PM
radfordhound.bsky.social
Yet this seems to be the best possible implementation of std::byteswap in MSVC as of present

If they always just do the manual swap, then debug mode builds are better and release mode *sometimes* optimizes it down to a bswap, but often times it doesn't!

The intrinsic MUST be used to ensure a bswap
November 21, 2024 at 10:31 PM
radfordhound.bsky.social
For comparison, this is what the same code looks like in a debug mode build made with GCC (much better):

Ah yes, a bswap.
A screenshot of x86 assembly output reading as follows: main: push rbp mov rbp, rsp sub rsp, 16 lea rax, [rbp-8] mov rsi, rax mov edi, OFFSET FLAT:std::cin call std::basic_istream<char, std::char_traits<char> >::operator>>(unsigned long long&) mov rax, QWORD PTR [rbp-8] mov rdi, rax call _ZSt8byteswapITkSt8integralyET_S0_ leave ret _ZSt8byteswapITkSt8integralyET_S0_: push rbp mov rbp, rsp mov QWORD PTR [rbp-8], rdi mov rax, QWORD PTR [rbp-8] bswap rax nop pop rbp ret
November 21, 2024 at 10:44 PM
community.openai.com.web.brid.gy
AI Challenge: The Assembly Test That Stumped Every AI… Except ChatGPT!
It is not minimum. I managed easily this morning to create a 15-step algorithm. With smarter optimizations (including the use of flags and loops) I am sure it can be done in fewer steps. `sub ecx, ecx ;ecx = 00000000` `lahf ;ah = 46 (flags = SZ0A0P1C)` `inc cx ;ecx = 00000001` `inc cx ;ecx = 00000002` `inc ch ;ecx = 00000102` `mov al, cl ;ax = 4602` `xchg ah, cl ;ax = 0202, ecx = 00000146` `inc ah ;ax = 0302` `rol ah, cl ;ax = C002` `ror al, cl ;ax = C008` `movzx ebx, ax ;ebx = 0000C008` `bswap ebx ;ebx = 08C00000` `ror al, cl ;ax = C020` `or cx, ax ;ecx = 0000C166` `or ecx, ebx ;ecx = 08C0C166`
community.openai.com
February 21, 2026 at 10:31 AM
radfordhound.bsky.social
If it's running in a compile-time context, they just do the endian-swap manually.

Otherwise, if it's running in a run-time context, they do the endian-swap via the intrinsic.

This means in release mode builds you get a bswap, but in debug mode builds, you get ABSOLUTELY HORRIBLE assembly:
A screenshot of the massive x86 assembly output - unfortunately too long to fit within the alt text. The important part is the following function: unsigned __int64 std::_Byteswap_uint64(unsigned __int64) PROC $LN6: mov QWORD PTR [rsp+8], rcx sub rsp, 40 call bool std::is_constant_evaluated(void) movzx eax, al test eax, eax je $LN2@Byteswap_u mov rax, QWORD PTR _Val$[rsp] shl rax, 56 mov rcx, QWORD PTR _Val$[rsp] shl rcx, 40 mov rdx, 71776119061217280 and rcx, rdx or rax, rcx mov rcx, QWORD PTR _Val$[rsp] shl rcx, 24 mov rdx, 280375465082880 and rcx, rdx or rax, rcx mov rcx, QWORD PTR _Val$[rsp] shl rcx, 8 mov rdx, 1095216660480 and rcx, rdx or rax, rcx mov rcx, QWORD PTR _Val$[rsp] shr rcx, 8 mov edx, -16777216 and rcx, rdx or rax, rcx mov rcx, QWORD PTR _Val$[rsp] shr rcx, 24 and rcx, 16711680 or rax, rcx mov rcx, QWORD PTR _Val$[rsp] shr rcx, 40 and rcx, 65280 or rax, rcx mov rcx, QWORD PTR _Val$[rsp] shr rcx, 56 or rax, rcx jmp SHORT $LN1@Byteswap_u jmp SHORT $LN1@Byteswap_u $LN2@Byteswap_u: mov rcx, QWORD PTR _Val$[rsp] call _byteswap_uint64 $LN1@Byteswap_u: add rsp, 40 ret 0 unsigned __int64 std::_Byteswap_uint64(unsigned __int64) ENDP
November 21, 2024 at 10:31 PM
pjb.sharkey.slugcat.systems
Is MSVC some kind of sick joke
MSVC compiling "load from memory and byte swap" as a bunch of 1-byte loads and shifts. MSVC failing to inline a function that's literally a single mov MSVC failing to realize a 32-bit endian swap can use the bswap instruction MSVC failing to inline std::vector<>::size()
April 8, 2026 at 8:36 AM
quantph-bot.bsky.social
charge interactions. Cross-resonance and bSWAP two-qubit gates are implemented, laying the foundation for universal quantum computing. An inter-qubit coupling strength exceeding 60~MHz has been observed, promising fast gate speed and suppressed [3/4 of https://arxiv.org/abs/2503.23738v1]
April 1, 2025 at 6:20 AM
stsquad.mastodon.org.uk.ap.brid.gy
I'm lost in a maze of #bswap helpers all subtly different.
March 19, 2025 at 1:11 PM
invlwhen.bsky.social
ok so there's bswap for htonl. htons? intel suggests, uh, xchg. (like xchg al, ah)

godbolt says gcc 15.1 uses rol at -O3 but xchg at -O1

bswap can even work on 64 bit operands--but not memory operands!!!
May 29, 2025 at 2:58 AM
scntechblogs.marianzeis.de
👤 Post by Bswap (by Members):
"Customizing Notification Templates in SAP Cloud Identity Access Governance (IAG)"
🔗 Link: https://community.sap.com/t5/technology-blog-posts-by-members/customizing-notification-templates-in-sap-cloud-identity-access-governance/ba-p/14342954
March 11, 2026 at 9:39 AM
community.openai.com.web.brid.gy
AI Challenge: The Assembly Test That Stumped Every AI… Except ChatGPT!
Here is a version of 13 instructions. The trick is that 4600h (after lahf) can be rotated to C008h. sub ecx, ecx ;ecx = 00000000 imul ecx ;eax = edx = 00000000 lahf ;eax = 00004600 (flags = SZ0A0P1C) mov cl, ah ;ecx = 00000046 dec cx ;ecx = 00000045 rol ax, cl ;eax = 0000C008 inc cx ;ecx = 00000046 mov dx, ax ;edx = 0000C008 bswap edx ;edx = 08C00000 ror al, cl ;eax = 0000C020 or ecx, edx ;ecx = 08C00046 or cx, ax ;ecx = 08C0C066 inc ch ;ecx = 08C0C166
community.openai.com
February 21, 2026 at 2:33 PM