#simd
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zooko2.bsky.social
Really digging GPT 6.1-Sol's performance on the sophisticated x86-64 SIMD optimizations. This screenshot is its third big win in a row today.
November 7, 2026 at 3:39 AM
1karlauer.bsky.social
naim, die simd ekelhaff und unnötik!! 😡😡
November 7, 2026 at 10:51 AM
plushie.holdings
glisten generates WebAssembly (WASM SIMD) modules directly from a declarative(-ish) grammar defined in a TypeScript DSL, instead of arborium's pipeline of JS -> C -> bindgen-rs -> WASM. here's the json grammar: git.t4t.associates/char/glisten/ref/main/blob/languages/config/json/grammar.ts
languages/config/json/grammar.ts - char/glisten @ main
languages/config/json/grammar.ts in char/glisten at main.
git.t4t.associates
November 8, 2026 at 4:27 AM
silasol.la
わたしの MBTI は SIMD
November 3, 2026 at 4:42 PM
leenerslohan.eurosky.social
ich bestätige dass es kürbne simd
November 3, 2026 at 5:06 PM
rauschers.eurosky.social
Spiegels simd verboteng auxh! 🧐 Gleichzeitiglich ist ein Zauberwort, aba man muss idd zaubär könn. ☝️
November 3, 2026 at 11:44 PM
jespino.bsky.social
In my post this week I'm getting Inside PGO to explore how it makes your program faster without changing a single line of your code.

I walk through all of it with a small shapes program and its real profile edges.

Here: internals-for-interns.com/posts/go-com...

#Golang #Performance
Inside PGO | Internals for Interns
In the previous article , we made Go code faster by changing how it computes. SIMD lets one CPU instruction work on several values at once, and the simd/archsimd and simd packages give Go access to it...
internals-for-interns.com
November 9, 2026 at 10:57 AM
eprint.ing.bot
Efficient SIMD SHAKE through Cost-Aware Permutation Scheduling (Hang Zhang, Ya Shi, Ying Liu, Xianhui Lu) ia.cr/2026/2666
Abstract. Lattice-based cryptography uses SHAKE to expand seeds into byte strings for matrix generation and sampling. SIMD Keccak implementations process multiple hash streams in parallel. Differences in stream lengths and input dependencies can prevent full SIMD utilization. We present a cost-aware method for scheduling Keccak permutations across hash streams during a single execution of a cryptographic algorithm. The method groups ready streams and divides long streams into segments for regrouping. A model of permutation calls, state movement, initialization, and input preparation guides the selection of stream groups, segment lengths, and state placements. We evaluate ML-KEM and HAETAE on an Apple M5, a Cortex-A72, and an Intel Core i5-11500, using Keccak kernels that process two, four, or eight streams per call. ML-KEM achieves speedups of up to 1.31× for encapsulation and 1.44× for decapsulation, while HAETAE achieves up to 1.28× for signing and 1.26× for verification.
November 9, 2026 at 2:07 AM
skywatch.bsky.social
Merged PR into main at bluesky-social/indigo: remove minio/sha256-simd (#1550)
November 6, 2026 at 7:32 AM
skywatch.bsky.social
New PR: remove minio/sha256-simd (#1550)
remove minio/sha256-simd by bnewbold · Pull Request #1550 · bluesky-social/indigo
Go stdlib has been fast for several versions now.
github.com
November 5, 2026 at 7:45 AM
givemegohan.xyz
記事を投稿しました！ SIMDって何？8つのOSSから学ぶ、速くする場所とデータの並べ方 qiita.com/givemegohan/items/fba65f5e01975636d771 #Qiita
November 9, 2026 at 3:35 AM
chainestate.bsky.social
Solana developers propose retiring durable nonces, the feature attackers used in April to steal at least 270M USD from Drift. Draft SIMD-0723 would not activate before 5 May 2027, and custodians using offline signing need replacement tools, as a failed approval would no longer… #crypto #blockchain
crypto news 🧠 eicker.crypto (@crypto@eicker.news)
Solana developers propose retiring durable nonces, the feature attackers used in April to steal at least 270M USD from Drift. Draft SIMD-0723 would not activate before 5 May 2027, and custodians using offline signing need replacement tools, as a failed approval would no longer be guaranteed to expire. Source: CoinDesk. https://www.coindesk.com/tech/2026/11/09/solana-moves-to-scrap-the-transaction-feature-used-in-the-usd270-million-drift-hack #Web3 #Blockchain #Solana
dlvr.it
November 9, 2026 at 7:42 AM
philipbak.bsky.social
And when I say months I mean months for me. What the fuck do I know about Android shader stalls and parallelising across SIMD?

Way too deep for generalist me.
November 9, 2026 at 2:00 PM
mrstentakel.bsky.social
Deng weissu docj, deng Kadsen simd sooo pimgelig
Olsen Twins: Ogvhs Faint Scene
ALT: Olsen Twins: Ogvhs Faint Scene
static.klipy.com
November 2, 2026 at 3:47 PM
coasa.fedibird.com.ap.brid.gy
twのほうでDCがたくさん水使う/使わないの話がでてるけど、いままでの一般的なDCとSIMD命令ぶん回すAIなDCで差異はあるのだろうか？( 'ω')
November 9, 2026 at 11:20 AM
eprint.ing.bot
Efficient Vectorized Implementation of MQOM (David Santos, Julio López, Francisco Rodríguez-Henríquez) ia.cr/2026/2439
Abstract. Post-quantum signature schemes require efficient implementations to be viable in practice. MQOM, a third-round candidate in NIST’s additional call for digital signatures, is a promising target for SIMD optimization. This work leverages a transpose-enabled paired-matrix trick to develop a vectorized implementation of MQOM v2.1, corresponding to the Round-2 specification, with reduced wasted SIMD work and memory traffic. We evaluate MQOM v2.1 on Arm NEON, x86 AVX2, and x86 AVX-512, covering key generation, signing, verification, and memory; peak dynamic memory falls by up to 39.43%. We also include supplementary MQOM v3 experiments to assess how the matrix-layout optimization transfers to the Round-3 code.
November 9, 2026 at 1:41 AM
ku1ik.hachyderm.io.ap.brid.gy
TIL about SWAR - "SIMD within a register". Trying it out to make asciinema's VT parser faster without requiring actual SIMD.
November 3, 2026 at 9:36 AM
osma.fishpool.org
Specifically, the data center compute chips aren’t useful for graphics, despite packing essentially similar SIMD cores, and they interface with memory using HBM bus, rather than the GDDR and DDR interfaces of desktop computing. These are not just chip assembly differences - the configuration of […]
November 8, 2026 at 7:39 AM
mrandrewmills.bsky.social
Annoying

github.com/bitwarden/cl...
Bitwarden does not work on non-SIMD supporting devices (Old CPUs / VMs) · Issue #24293 · bitwarden/clients
Steps To Reproduce Run a Windows 10 guest on Proxmox VE 8 with VM CPU type "kvm64" (x86-64-v1, no SSE4.1) Install Firefox 159.0 and Bitwarden browser extension 2026.10.1 Open the extension / unlock...
github.com
November 8, 2026 at 3:34 AM
aitraderview.bsky.social
Solana Developers Propose Retiring Durable Nonces, the Feature Exploited in the Drift Hack
aitraderview.com/2026/11/09/s...

#Solana #SOL #Drift #CryptoSecurity
Solana Developers Propose Retiring Durable Nonces, the Feature Exploited in the Drift Hack - AiTraderView.com
Anza's SIMD-0723 would end durable nonces, used to drain at least $270 million from Drift in April; activation no earlier than May 2027.
aitraderview.com
November 9, 2026 at 9:35 AM
falls.foryou.fast
me: hello language model let's implement a simd tokenizer today according to this design
llm: hello i have implemented a normal sauce sequential scanner. it passes all the tests i just made up
October 31, 2026 at 6:49 PM
punkters.eurosky.social
alle auf der party simd älter als 9 😊
October 31, 2026 at 11:23 PM
golab.io
⚡ Unlocking the power of SIMD in Go!

A big thank you to Jesús Espino for taking us inside the CPU and exploring how SIMD enables parallel data processing, from vector registers to writing SIMD code directly in Go.

Great insights! 💙 #GoLab2026
November 2, 2026 at 11:08 AM
eprint.ing.bot
FN-DSA on Arm Cortex-M55: Revisiting a Floating-Point Lattice Signature with Native FP64 and Helium (Seung-Won Lee, Min-Joo Sim, Min-Seo Kim, Hwa-Jeong Seo) ia.cr/2026/2559
Abstract. FN-DSA has the shortest signatures among NIST’s post-quantum signature standards, but on microcontrollers its signing is slow because the binary64 arithmetic it specifies is emulated with integer instructions. Previous speedups either change the arithmetic or the order of random sampling, so their signatures no longer match the known-answer tests (KATs) of the reference implementation, or rely on double-precision SIMD instructions that microcontrollers lack. The Arm Cortex-M55 has both a double-precision FPU and the M-Profile Vector Extension (MVE). On this core, we present the first FN-DSA implementation that, unlike these approaches, reproduces the KATs of the reference and runs in constant time, yet is faster than the reference. On MVE, we vectorize the NTTs with layer merging and the fixed-point FFT of key generation with split-word Q32 arithmetic on 32-bit lanes. On the FPU, bit-exact FP64 computes the FFT, LDL decomposition, split, merge and sampler of signing without changing any result, and exponent-normalized division turns the bit-by-bit divisions of key generation into a single VDIV.F64 with operand-independent latency. For Keccak, vectorized bit interleaving speeds up every permutation, and request-level batching processes four independent verification requests at once; SLOTHY then reschedules our MVE and Keccak assembly. Key generation, signing and verification become up to 1.23x, 1.93x and 1.30x faster than the reference on the same core, and batch verification of four signatures up to 1.75x faster. Overall, the FPU pays off where the reference emulates an operation with many integer instructions, and MVE where it already computes with integers or fixed point. Image showing part 2 of abstract.
November 9, 2026 at 1:54 AM
bringmayflowers.bsky.social
I am anti-SIMD gang now and forevermore. Fuck you if you use MMX or SSE or AltiVec.
November 3, 2026 at 2:40 AM