With market valuation touching record highs but datacenter demand far outstripping TSMC CoWoS packaging capacity, NVIDIA has partnered with Palantir to deploy operational AI models across raw silicon procurement, foundry logistics, and component packaging.

With market valuation touching record highs but datacenter demand far outstripping TSMC CoWoS packaging capacity, NVIDIA has partnered with Palantir to deploy operational AI models across raw silicon procurement, foundry logistics, and component packaging.

Taiwan Semiconductor Manufacturing Co.'s advanced packaging technology, chip-on-wafer-on-substrate-L, or CoWoS-L, remains the dominant force in AI semiconductor

New collaborations span A14 design enablement, AI-assisted engineering workflows, CoWoS® support for multi-die designs, and unified multiphysics signoff Certified EDA flows on TSMC A14 accelerate design readiness for next-generation AI and HPC applications Collaboration on agentic AI workflows accelerates automation and improves productivity for complex analog, digital, and multi-die designs Continued enablement for IVR multi-die designs on TSMC CoWoS® technology addresses power integrity and thermal requirements for AI systems Continued joint enablement for TSMC-COUPE™ streamlines co-packaged optics development and verification Expanded 2nm IP portfolio and tape-out milestones including for PCIe 7.0 and HBM4 speed the development of differentiated AI, data […]

Synopsys and TSMC are expanding their collaboration to accelerate the development of AI, high-performance computing (HPC), and other advanced semiconductor systems. The latest work combines certified EDA flows for TSMC’s A14 process, agentic AI-assisted engineering workflows, multi-die design capabilities for CoWoS packaging, multiphysics-aware signoff, and an expanding portfolio of silicon-proven interface and foundation IP. For advanced-node adoption, Synopsys and TSMC have achieved certification of digital and analog design flows for A14, providing a methodology covering implementation through signoff. The companies are also working on device-routing enablement for A14 in analog design, targeting automated place-and-route capabilities intended to improve layout productivity and facilitate migration to advanced process technologies.

半導體晶圓測試供應商漢民測試系統上午舉行上櫃掛牌典禮，總經理王子建預期，2027年矽光子共同封裝光學（CPO）測試設備可逐步貢獻營收，漢測持續扎根CoWoS先進封裝設備，預期明年營收逐步放量，未來整體投資重點仍聚焦台灣。