#Diamondrapids
December 10, 2024 at 8:03 PM
Another interesting #Intel #DiamondRapids info from Linux kernel list:
It seems DMR has multiple L3 cache, one per #CBB (Core Building Block = CPU die)
lore.kernel.org/all/20251227...
January 1, 2026 at 6:05 PM
#Intel refreshed the "Intel Resource Director Technology (Intel RDT) Architecture Specification" to 1.3 356688-004
cdrdv2-public.intel.com/851356/35668...
#DiamondRapids
January 6, 2026 at 8:31 PM
June 7, 2025 at 10:43 AM
#Intel released the SDE 10.8 (Software Development Emulator):
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
March 27, 2026 at 12:10 PM
#Intel refreshed the xAPIC depreciation plan with #NovaLake and #DiamondRapids:
September 19, 2025 at 11:55 AM
#Intel released the SDE 10.5.0 (Software Development Emulator), sync with 60th ISA Ext Guide:
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
February 1, 2026 at 7:24 PM
November 9, 2025 at 8:44 PM
#Intel released the SDE 10.7 (Software Development Emulator) with Indirect Branch History Fence ( #IBHF) instruction support and refreshed CPUID dumps:
www.intel.com/content/www/...
#NovaLake #DiamondRapids #APX #AVX10_2
February 26, 2026 at 9:37 AM
#Intel released the 60th edition of the ISA Extensions Reference with official announcement of #AVX10 and #APX support on #NovaLake, and FP8 type clarifications.
Download:
cdrdv2-public.intel.com/869288/31943...
#DiamondRapids #NovaLake #WildcatLake #PantherCove #CoyoteCove #ArcticWolf
November 13, 2025 at 8:07 AM
#Intel released the SDE 9.58.0 (Software Development Emulator), sync with 57th ISA Ext Guide
Download:
downloadmirror.intel.com/859732/sde-e...
- #DiamondRapids CPUID is 400F10 instead of D0660 (in-line with ISA Ext Guide)
- #GraniteRapids256 removed
July 10, 2025 at 12:19 PM
August 26, 2026 at 9:47 AM
#Intel released the 58th edition of the ISA Extensions Reference with fixes and clarifications:
#PantherLake #DiamondRapids #ClearwaterForest
Download:
cdrdv2-public.intel.com/859029/31943...
CPUID.(EAX=23H,ECX=0H):EBX[2] = #RDPMCUserDisable
July 9, 2025 at 1:40 PM
#Intel ISA defragmentation:
SDE 9.48 internally shows, that under the #AVX10_2 label there are 15 instruction groups in #DiamondRapids
December 22, 2024 at 10:24 PM
#Intel released the 57th edition of the ISA Extensions Reference with updates:
#PantherLake #DiamondRapids #ClearwaterForest
Download:
cdrdv2-public.intel.com/851355/31943...
#256BITSGX #ASYM_RDT
April 3, 2025 at 10:17 AM
#Intel refreshed the Advanced Performance Extensions (#Intel #APX) Architecture Specification to 9.0:
cdrdv2-public.intel.com/926860/35582...
#APX #DiamondRapids #NovaLake #PantherCove #CoyoteCove #ArcticWolf
August 26, 2026 at 9:32 AM
#Intel released the 56th edition of the ISA Extensions Reference with minor updates and clarifications:
#PantherLake #DiamondRapids #ClearwaterForest
Download:
cdrdv2-public.intel.com/843860/archi...
December 27, 2024 at 7:48 AM
I just finished my first meaningful #APX code path: #SHA3 / #Keccak1600 on 32 GPR registers: Only 130 uops + a few MOVs. I wonder if it can beat the latency of 35+ uop #AVX512 version on #Intel #DiamondRapids.
#Novalake , #PantherCove , #CoyoteCove
July 31, 2025 at 3:13 PM
#Intel released the 62nd edition of the ISA Extensions Reference with.
#UTMR and #AMX_TF32 support removed (it means only one instruction: TMMULTF32PS)
Download:
cdrdv2-public.intel.com/922690/31943...
#DiamondRapids #NovaLake #PantherCove #CoyoteCove #ArcticWolf
June 27, 2026 at 9:14 AM