#FlowPPU
What made Flow stand out? In Pt 2 of our Investor Series, Jon-Kåre Hansen of #Sarsia shares what differentiated us as he looked @ the technology & problem we’re solving.
#ParallelPerspectives #Podcast #CPU #VC #FlowPPU #Semiconductor #HPC #DeepTech
September 22, 2026 at 9:59 AM
Why invest in us? In Pt 1 of our investor series, we hear from Jon-Kåre Hansen of #Sarsia & Juho Risku of #ButterflyVentures to hear what 1st caught their attention 1st & why they chose to invest in us. #ParallelPerspectives #Podcast #CPU #VC #FlowPPU #HPC #InvestorPodcast #Semiconductor #DeepTech
September 8, 2026 at 8:14 AM
The results are in. Our performance results page is live.
Access benchmark results, speedup data & how #FlowPPU approaches scalable parallel performance alongside the #CPU.
Review the data: flow-computing.com/performance/

#Semiconductor #ParallelComputing #HPC #DeepTech #FlowComputing #AI
September 15, 2026 at 3:03 PM
September 17, 2026 at 9:20 AM
You can’t trust everyone.
You can trust the architecture.
Flow PPU → scalable parallel performance
The science behind it → flow-computing.com/SCIENCE/

#ComputerArchitecture #ParallelComputing #FlowPPU #DeepTech #CPU #HPC #Semiconductor
February 10, 2026 at 9:09 AM
Shared memory is central to parallel computing, but difficult to scale efficiently. Traditional multicore systems rely on cache coherence, introducing overhead & limiting scalability. ESM addresses this, enabling high-throughput execution, latency hiding, & simplified parallel programming.
April 14, 2026 at 9:26 AM
ISA independence gives long-term optionality. Open standards like RISC-V make that optionality real.

@riscv.org.web.brid.gy, @riser-project.bsky.social

#OpenSource #RISCV #ComputerArchitecture #FlowPPU #CPU #DeepTech #HPC #Semiconductor
#FlowPPU is instruction set independent, enabling integration across different #CPU ecosystems w/o locking performance gains to a single ISA. #RISCV is our 1st supported architecture bc its open standard, tooling, & community align w/ this philosophy + accelerate both innovation & collaboration.
February 2, 2026 at 8:01 AM
This makes it well suited for robotics and embedded systems, where low-latency and predictable performance are essential.
→ flow-computing.com/solutions/

#NationalRoboticsWeek #CPU #FlowPPU #HPC #Semiconductors #DeepTech #AI #FlowComputing #ParallelComputing
Robotics depends on fast, deterministic execution across parallel workloads. Sensor & signal processing workloads require efficient parallel execution to handle high-throughput data streams in real time. #FlowPPU enables nextgen performance, delivering scalable parallel execution w/ CPUs.
#CPU #HPC
April 9, 2026 at 7:43 AM
Marcello will speak @ World #RISC-VDays in Turin on Feb 26. He'll present The PPU Technology of Flow Computing, covering how #FlowPPU enables scalable parallel performance while remaining instruction-set independent, working alongside modern #CPU architectures including #RISCV.
February 12, 2026 at 10:34 AM
Arctic15 (12.6)
Timo will attend and participate as a panelist.
If you’ll be at Hello Tomorrow and want to connect, request a meeting with Timo here:
flow-computing.com/meet-timo-at...

#DeepTech #Semiconductors #AI #FlowPPU #HPC #ParallelComputing #CPU #VC #Innovation #StartUp
Next week, our CEO & Co-Founder, Timo Valtonen, will represent us at #HelloTomorrow Investor Day & Summit & #Arctic15.
Hello Tomorrow (10-11.6)
Following our selection as a #DeepTech Pioneer, Timo will meet with investors, partners, & industry leaders in #semiconductors & #AI.
June 3, 2026 at 1:55 PM
We’re focused on this challenge. #FlowPPU is a general-purpose parallel co-processor designed to work w/ the #CPU, enabling scalable, high-throughput parallel execution for modern workloads. Explore our technology: flow-computing.com/technology
Source: @cnbc.com
www.cnbc.com/2026/03/13/n...
#HPC
These systems rely on: orchestration across agents, data movement, &tool execution & control. System performance increasingly depends on how efficiently a #CPU can support & coordinate these workloads. Improving how parallel workloads are executed @ the CPU level is increasingly important. #AI #HPC
AI isn’t just about GPUs. A recent report highlights this. In a @cnbc.com interview w/ Dion Harris, #NVIDIA, he noted that CPUs are ‘becoming the bottleneck’ in AI & agentic workflows. As AI moves toward multi-step, agent-based systems, this reflects a broader change in how workloads are executed.
March 24, 2026 at 5:11 PM
We’re 2! Over the past 2 years, we’ve been developing #FlowPPU, a licensable co-processor designed to unlock efficient, general-purpose parallel execution across architectures. Thank you to our team, partners, & investors for being part of our journey.
#DeepTech #Semiconductors #Startup #HPC #CPU
March 6, 2026 at 7:37 AM
Thank you to #Maria01. We are proud to be part of your community.🌟
#StartUp #Helsinki #Finland #DeepTech #PPU #FlowPPU #CPU #HPC
January 27, 2026 at 9:46 AM
#FlowPPU is built to support scalable #ParallelPerformance w/ the CPU for industrial & embedded systems. This #LogisticsDay, we’re focused on the compute Infrastructure powering smarter, more autonomous logistics systems. Learn more:
flow-computing.com/solutions
#SmartLogistics #WharehouseAutomation
June 26, 2026 at 10:30 AM
Recently in cool Oulu. Our founders + Gábor Márton, PhD, & Marcello Ranone, spent time in person aligning on priorities & brainstorming on the next steps. Yes, there was time for a sauna by the #Oulu river & dipping into ice-cold avanto too. (At -21°C.)

#FlowPPU #DeepTech #Semiconductor #CPU #HPC
February 5, 2026 at 8:02 AM
#FlowPPU is instruction set independent, enabling integration across different #CPU ecosystems w/o locking performance gains to a single ISA. #RISCV is our 1st supported architecture bc its open standard, tooling, & community align w/ this philosophy + accelerate both innovation & collaboration.
February 2, 2026 at 7:59 AM
NextGen performance comes from how efficiently parallel work happens inside CPUs. #FlowPPU is built around this: #ParallelProcessing integrates directly into the #CPU; Works across architectures - x86, arm, @riscv.org.web.brid.gy, OpenPower; Configurable for different targets (hyperscale - edge).
February 17, 2026 at 1:06 PM
Flow was selected as a Hello Tomorrow #DeepTech Pioneer. Now our CEO & Co-Founder, Timo Valtonen will be attending #HelloTomorrow Investor Day & Summit.
Meet him on June 10-12, 2026, Amsterdam, NL
Request a meeting: lnkd.in/duGBpzBU
#CPU #HPC #Semiconductor #invest #FlowPPU #FlowComputing
April 27, 2026 at 6:21 AM
We’ve had great conversations & we’re looking forward to more before we head back home. If you didn’t get a chance to see our poster, you can still look here: flow-computing.com/hotchips/ Thank you, #HotChips, and thank you to everyone who made our time here worthwhile.🦾
#CPU #HPC #DeepTech #FlowPPU
August 27, 2026 at 9:07 AM
We’re ready for #HotChips2026. We'll be at the #HotChipsSymposium this week, sharing our latest #FlowPPU performance results + what we’ve been working on to enable the next gen #CPU performance. Attending? Keep an eye out for the FLOW merch. Even Fudo is rocking a #FLOW hat for the occasion!
#HPC
August 23, 2026 at 4:46 PM
We're in the US & getting ready for an exciting week of convo around the future of #CPU performance. We still have a few meeting slots available while we’re here. Interested in meeting with us and learning more about the Flow PPU? Book a meeting with us here: flow-computing.com/hot-chips-20...
August 18, 2026 at 1:27 PM
Learn how Flow PPU enables next-generation CPU performance.
flow-computing.com/solutions/

#FlowComputing #ParallelComputing #ComputerArchitecture #CPU #Semiconductors #ProcessorDesign #AIInfrastructure #HPC #DeepTech #FlowPPU
How do instruction dependencies affect parallel performance? #CPUs include multiple FUs. To maximize utilization, instructions assigned to them typically need to be independent. #FlowPPU supports dependent instructions through high-bandwidth intercommunication and sequential organization.
#CPU #HPC
August 3, 2026 at 2:41 PM
How do instruction dependencies affect parallel performance? #CPUs include multiple FUs. To maximize utilization, instructions assigned to them typically need to be independent. #FlowPPU supports dependent instructions through high-bandwidth intercommunication and sequential organization.
#CPU #HPC
August 3, 2026 at 2:41 PM
Thank you to Zivile Einikyte & the #SuperheroCapital team for the thoughtful conversation.

Watch the full conversation:
flow-computing.com/interviews/

#Semiconductors #CPU #ChipDesign #ComputerArchitecture #DeepTech #FlowPPU #HPC #FlowComputing
Building breakthrough tech is 1 part of the challenge. As Timo explains, success in #semiconductors depends on earning trust, finding internal champions, & navigating 1 of the most relationship-driven industries. Thank you to Zivile Einikyte & #SuperheroCapital team for the thoughtful conversation.
July 30, 2026 at 9:35 AM