it's always two dumb chiplets telling each other "exactlyyyyy"
December 5, 2024 at 9:35 PM
it's always two dumb chiplets telling each other "exactlyyyyy"
Using Zen CPUs in desktops: "yes...YES! Look at all of my beautiful CPU cores! Chiplets rock!!"
Using Zen CPUs in servers: "what is this 'chiplets' bullshit. what the fuck is happening to my tail latency?? Mods??????"
Using Zen CPUs in servers: "what is this 'chiplets' bullshit. what the fuck is happening to my tail latency?? Mods??????"
December 12, 2024 at 9:24 PM
Using Zen CPUs in desktops: "yes...YES! Look at all of my beautiful CPU cores! Chiplets rock!!"
Using Zen CPUs in servers: "what is this 'chiplets' bullshit. what the fuck is happening to my tail latency?? Mods??????"
Using Zen CPUs in servers: "what is this 'chiplets' bullshit. what the fuck is happening to my tail latency?? Mods??????"
Nvidia is investing $5 billion into Intel to jointly develop PC and data center chips. The investment will see Intel help Nvidia build x86 chips that integrate RTX GPU chiplets. Full details 👇 www.theverge.com/news/780792/...
Nvidia invests $5 billion into Intel to jointly develop PC and data center chips
Intel will help build x86 chips with Nvidia RTX GPU chiplets
www.theverge.com
September 18, 2025 at 11:38 AM
Nvidia is investing $5 billion into Intel to jointly develop PC and data center chips. The investment will see Intel help Nvidia build x86 chips that integrate RTX GPU chiplets. Full details 👇 www.theverge.com/news/780792/...
The last major technological innovation that made a genuine change in how we live was the smartphone.
Everything since has been iterative, not innovative.
Even "chiplets" are iterative, because it's just a new way to do multi-CPU systems which we've had since the 1990s.
We're at a dead halt.
Everything since has been iterative, not innovative.
Even "chiplets" are iterative, because it's just a new way to do multi-CPU systems which we've had since the 1990s.
We're at a dead halt.
January 14, 2025 at 11:21 PM
The last major technological innovation that made a genuine change in how we live was the smartphone.
Everything since has been iterative, not innovative.
Even "chiplets" are iterative, because it's just a new way to do multi-CPU systems which we've had since the 1990s.
We're at a dead halt.
Everything since has been iterative, not innovative.
Even "chiplets" are iterative, because it's just a new way to do multi-CPU systems which we've had since the 1990s.
We're at a dead halt.
We are in the age of RISC-V chiplets, apparently.
Still testing the new DeepComputing DC-ROMA Mainboard II, with 8 SiFive P550 cores, Imagination GPU, and separate NPU chip, with 32 GB of shared RAM. The way it works is... interesting.
Stay tuned for a video. Might take a little longer than usual.
Still testing the new DeepComputing DC-ROMA Mainboard II, with 8 SiFive P550 cores, Imagination GPU, and separate NPU chip, with 32 GB of shared RAM. The way it works is... interesting.
Stay tuned for a video. Might take a little longer than usual.
October 16, 2025 at 1:54 AM
We are in the age of RISC-V chiplets, apparently.
Still testing the new DeepComputing DC-ROMA Mainboard II, with 8 SiFive P550 cores, Imagination GPU, and separate NPU chip, with 32 GB of shared RAM. The way it works is... interesting.
Stay tuned for a video. Might take a little longer than usual.
Still testing the new DeepComputing DC-ROMA Mainboard II, with 8 SiFive P550 cores, Imagination GPU, and separate NPU chip, with 32 GB of shared RAM. The way it works is... interesting.
Stay tuned for a video. Might take a little longer than usual.
ADVANCED MICRO DEVICES, INC: “we have invented a new kind of chiplet that’s made out of other chiplets. this enables us to create the new EPYC 9666X3D with 32GB of L2 cache. topology information will be available to system software via a new CPUID leaf that instantly kills you.”
October 8, 2025 at 1:20 AM
ADVANCED MICRO DEVICES, INC: “we have invented a new kind of chiplet that’s made out of other chiplets. this enables us to create the new EPYC 9666X3D with 32GB of L2 cache. topology information will be available to system software via a new CPUID leaf that instantly kills you.”
The way they used to make tech was interesting; the workarounds, the mistakes, the rush to be first, the successes and even the failures all represented achievements.
I think the only real big innovation I can think of are "chiplets," but those were just a new way to do multi CPUs.
I think the only real big innovation I can think of are "chiplets," but those were just a new way to do multi CPUs.
January 13, 2025 at 10:44 PM
The way they used to make tech was interesting; the workarounds, the mistakes, the rush to be first, the successes and even the failures all represented achievements.
I think the only real big innovation I can think of are "chiplets," but those were just a new way to do multi CPUs.
I think the only real big innovation I can think of are "chiplets," but those were just a new way to do multi CPUs.
The future is bright and built on chiplets ( and multi vendor Collabs) #OpenCompute #HPC
November 17, 2024 at 3:16 PM
The future is bright and built on chiplets ( and multi vendor Collabs) #OpenCompute #HPC
This is the year of "never thought I'd see it" www.theverge.com/news/780792/...
Nvidia invests $5 billion into Intel to jointly develop PC and data center chips
Intel will help build x86 chips with Nvidia RTX GPU chiplets
www.theverge.com
September 18, 2025 at 3:06 PM
This is the year of "never thought I'd see it" www.theverge.com/news/780792/...
For Ryzen CPUs, AMD would have to put out a different model, and that would mean a parallel ecosystem: DDR Ryzen CPUs, and HBM Ryzen CPUs. Each would need their own motherboards and they wouldn't be compatible with each other.
Intel's moving to chiplets, so they could do likewise.
Intel's moving to chiplets, so they could do likewise.
July 30, 2026 at 4:26 AM
For Ryzen CPUs, AMD would have to put out a different model, and that would mean a parallel ecosystem: DDR Ryzen CPUs, and HBM Ryzen CPUs. Each would need their own motherboards and they wouldn't be compatible with each other.
Intel's moving to chiplets, so they could do likewise.
Intel's moving to chiplets, so they could do likewise.
The widespread adoption of chiplets in domain-specific applications is creating a partitioning challenge that is much more complex than anything chip design teams have dealt with in previous designs.
semiengineering.com/partitioning...
semiengineering.com/partitioning...
Partitioning In The Chiplet Era
Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.
semiengineering.com
November 24, 2024 at 5:08 PM
The widespread adoption of chiplets in domain-specific applications is creating a partitioning challenge that is much more complex than anything chip design teams have dealt with in previous designs.
semiengineering.com/partitioning...
semiengineering.com/partitioning...
Now, we can come up with more stopgaps to work around the coming problems with silicon, and we can probably rearrange the deck chairs for another decade or so. We've already done things like hyperthreading, multiple cores per processor, chiplets, 3D transistors, lots of tricks and workarounds.
December 10, 2024 at 1:13 AM
Now, we can come up with more stopgaps to work around the coming problems with silicon, and we can probably rearrange the deck chairs for another decade or so. We've already done things like hyperthreading, multiple cores per processor, chiplets, 3D transistors, lots of tricks and workarounds.
Chiplets and 3D-IC architectures add new thermal-mechanical stresses that can affect the reliability of entire systems.
semiengineering.com/chiplets-and...
#chiplets
semiengineering.com/chiplets-and...
#chiplets
Chiplets And 3D-ICs Add New Electrical And Mechanical Challenges
Reliability is now a system-level concern that includes everything from materials and packaging to testing with backside power.
semiengineering.com
February 12, 2026 at 4:23 PM
Chiplets and 3D-IC architectures add new thermal-mechanical stresses that can affect the reliability of entire systems.
semiengineering.com/chiplets-and...
#chiplets
semiengineering.com/chiplets-and...
#chiplets
Qualcomm bereitet seine Serveroffensive vor. Mit Oryon-Kernen und Chiplets geht es gegen AMD und Intel. #Prozessoren
Qualcomm will ab 2028 AMD und Intel bei Servern Konkurrenz machen
Qualcomm bereitet seine Serveroffensive vor. Mit Oryon-Kernen und Chiplets geht es gegen AMD und Intel.
www.heise.de
July 31, 2025 at 2:47 PM
Qualcomm bereitet seine Serveroffensive vor. Mit Oryon-Kernen und Chiplets geht es gegen AMD und Intel. #Prozessoren
Nvidia invests $5 billion into Intel to jointly develop PC and data center chips
Nvidia invests $5 billion into Intel to jointly develop PC and data center chips
Intel will help build x86 chips with Nvidia RTX GPU chiplets
buff.ly
September 18, 2025 at 11:40 AM
Nvidia invests $5 billion into Intel to jointly develop PC and data center chips
Researchers at @ucsantabarbara.bsky.social have monolithically integrated quantum dot lasers onto silicon chiplets, tackling coupling loss and enabling scalable, foundry-friendly PICs: optics.org/news/16/7/32
July 24, 2025 at 9:45 PM
Researchers at @ucsantabarbara.bsky.social have monolithically integrated quantum dot lasers onto silicon chiplets, tackling coupling loss and enabling scalable, foundry-friendly PICs: optics.org/news/16/7/32
What Are Chiplets and Why They Are So Important for the Future of Processors
- The Chiplets Explainer
- The Chiplets Explainer
What Are Chiplets and Why They Are So Important for the Future of Processors
While chiplets have been around for decades, today they are the hottest trend in chip making powering millions of devices from PCs, to servers, phones and wearables.
bit.ly
January 2, 2025 at 10:05 AM
What Are Chiplets and Why They Are So Important for the Future of Processors
- The Chiplets Explainer
- The Chiplets Explainer
Transistor scaling is hitting thermal and cost ceilings, pushing chip design toward modular chiplets connected by high-speed links. With shared substrates and tailored process nodes, teams manage heat density and sustain performance without relying on miniaturization.
#Semiconductors #Chiplets
#Semiconductors #Chiplets
May 8, 2026 at 1:30 PM
Transistor scaling is hitting thermal and cost ceilings, pushing chip design toward modular chiplets connected by high-speed links. With shared substrates and tailored process nodes, teams manage heat density and sustain performance without relying on miniaturization.
#Semiconductors #Chiplets
#Semiconductors #Chiplets
"Glass Packaging for Chiplets Heterogeneous Integration", John Lau, Unimicron, J of Microele & Ele Pkg, 26-09-15 imapsjmep.org/article/1699...
<= IEEE SCV EPS Lecture, 09-24 bsky.app/profile/ogaw...
Slides URL (80 pp) r6.ieee.org/scv-eps/wp-c...
τ -Law & Glass, 电子与封装, 07-06 bsky.app/profile/ogaw...
<= IEEE SCV EPS Lecture, 09-24 bsky.app/profile/ogaw...
Slides URL (80 pp) r6.ieee.org/scv-eps/wp-c...
τ -Law & Glass, 电子与封装, 07-06 bsky.app/profile/ogaw...
September 27, 2026 at 1:31 AM
"Glass Packaging for Chiplets Heterogeneous Integration", John Lau, Unimicron, J of Microele & Ele Pkg, 26-09-15 imapsjmep.org/article/1699...
<= IEEE SCV EPS Lecture, 09-24 bsky.app/profile/ogaw...
Slides URL (80 pp) r6.ieee.org/scv-eps/wp-c...
τ -Law & Glass, 电子与封装, 07-06 bsky.app/profile/ogaw...
<= IEEE SCV EPS Lecture, 09-24 bsky.app/profile/ogaw...
Slides URL (80 pp) r6.ieee.org/scv-eps/wp-c...
τ -Law & Glass, 电子与封装, 07-06 bsky.app/profile/ogaw...
Loongson's 3C6000 series can use one, two or four of these chiplets for 16, 32 or up to 64 of their own LA664 cores. They still use a DDR4 interface, while prices for DDR4 are raising right now.
Does anyone know where the chiplets are being made?
www.hardwareluxx.de/index.php/ne...
Does anyone know where the chiplets are being made?
www.hardwareluxx.de/index.php/ne...
June 26, 2025 at 10:16 AM
Loongson's 3C6000 series can use one, two or four of these chiplets for 16, 32 or up to 64 of their own LA664 cores. They still use a DDR4 interface, while prices for DDR4 are raising right now.
Does anyone know where the chiplets are being made?
www.hardwareluxx.de/index.php/ne...
Does anyone know where the chiplets are being made?
www.hardwareluxx.de/index.php/ne...
AMD’s new Ryzen 9 9950X3D2 is releasing on April 22nd. It has 16 cores, 208MB of total cache, and both chiplets have AMD’s 3D V-Cache. AMD is aiming it at creators and devs, with 5–10% performance gains over the 9950X3D in DaVinci Resolve and Blender www.youtube.com/watch?v=_Ern...
AMD Ryzen™ 9 9950X3D2 Dual Edition Processor Announcement
YouTube video by AMD
www.youtube.com
March 26, 2026 at 5:32 PM
AMD’s new Ryzen 9 9950X3D2 is releasing on April 22nd. It has 16 cores, 208MB of total cache, and both chiplets have AMD’s 3D V-Cache. AMD is aiming it at creators and devs, with 5–10% performance gains over the 9950X3D in DaVinci Resolve and Blender www.youtube.com/watch?v=_Ern...
There are certain hacks like chiplets which let you optimize the power-area-transistor count tradeoff
August 29, 2026 at 6:08 AM
There are certain hacks like chiplets which let you optimize the power-area-transistor count tradeoff
Huawei stapelt Chiplets, weil man nicht bei TSMC einkaufen darf. Der KI-Boom beschert EU-Firmen Aufwind. Neue KI-Chips rücken dichter an die von Nvidia heran. #Bit-Rauschen
heise+ | Bit-Rauschen: Huaweis Logic-Folding-Technik und neue KI-Konkurrenz für Nvidia
Huawei stapelt Chiplets, weil man nicht bei TSMC einkaufen darf. Der KI-Boom beschert EU-Firmen Aufwind. Neue KI-Chips rücken dichter an die von Nvidia heran.
www.heise.de
September 28, 2026 at 5:03 AM
Huawei stapelt Chiplets, weil man nicht bei TSMC einkaufen darf. Der KI-Boom beschert EU-Firmen Aufwind. Neue KI-Chips rücken dichter an die von Nvidia heran. #Bit-Rauschen