Look, I bought a new workstation! The latest in chiplet design...
...back in 2009
...back in 2009
November 5, 2025 at 9:06 PM
Look, I bought a new workstation! The latest in chiplet design...
...back in 2009
...back in 2009
New video: How AMD is re-thinking Chiplet Design
youtu.be/maH6KZ0YkXU
youtu.be/maH6KZ0YkXU
youtu.be
September 27, 2025 at 6:18 PM
New video: How AMD is re-thinking Chiplet Design
youtu.be/maH6KZ0YkXU
youtu.be/maH6KZ0YkXU
ADVANCED MICRO DEVICES, INC: “we have invented a new kind of chiplet that’s made out of other chiplets. this enables us to create the new EPYC 9666X3D with 32GB of L2 cache. topology information will be available to system software via a new CPUID leaf that instantly kills you.”
October 8, 2025 at 1:20 AM
ADVANCED MICRO DEVICES, INC: “we have invented a new kind of chiplet that’s made out of other chiplets. this enables us to create the new EPYC 9666X3D with 32GB of L2 cache. topology information will be available to system software via a new CPUID leaf that instantly kills you.”
Happy Pocky DAY 2024!!
feat. my characters Doerothy, Chiplet, and Kerginein.
Share the feast! ✨
#PockyDay #anthro #furry #digitalart
feat. my characters Doerothy, Chiplet, and Kerginein.
Share the feast! ✨
#PockyDay #anthro #furry #digitalart
November 12, 2024 at 3:53 AM
Happy Pocky DAY 2024!!
feat. my characters Doerothy, Chiplet, and Kerginein.
Share the feast! ✨
#PockyDay #anthro #furry #digitalart
feat. my characters Doerothy, Chiplet, and Kerginein.
Share the feast! ✨
#PockyDay #anthro #furry #digitalart
Thanks to @engtechnic.bsky.social for answering some of the questions here.
AMD's "chiplet" design means the memory controllers and the thinking cores in their CPUs and GPUs are separate parts, so AMD could definitely put our commercial graphics cards using HBM with existing GPU chips.
But.
AMD's "chiplet" design means the memory controllers and the thinking cores in their CPUs and GPUs are separate parts, so AMD could definitely put our commercial graphics cards using HBM with existing GPU chips.
But.
as far as graphics cards to, mid to large die RDNA3 could be converted over as memory controllers are seperate chiplets, so swap those over, and there you go, but's the only gpu arch presently that can do this
July 30, 2026 at 4:24 AM
Thanks to @engtechnic.bsky.social for answering some of the questions here.
AMD's "chiplet" design means the memory controllers and the thinking cores in their CPUs and GPUs are separate parts, so AMD could definitely put our commercial graphics cards using HBM with existing GPU chips.
But.
AMD's "chiplet" design means the memory controllers and the thinking cores in their CPUs and GPUs are separate parts, so AMD could definitely put our commercial graphics cards using HBM with existing GPU chips.
But.
The NPU CPUs from AMD for desktop and laptops don't use the chiplet design (modular, individual chips exclusively for processing cores). They're monolithic, meaning they're a single slab of silicon with everything etched into it.
And they cost Ryzen its primary advantage: production and speed.
And they cost Ryzen its primary advantage: production and speed.
March 4, 2026 at 9:50 PM
The NPU CPUs from AMD for desktop and laptops don't use the chiplet design (modular, individual chips exclusively for processing cores). They're monolithic, meaning they're a single slab of silicon with everything etched into it.
And they cost Ryzen its primary advantage: production and speed.
And they cost Ryzen its primary advantage: production and speed.
Ahead of AMD's annual AI event this week, Nvidia is pulling back the curtain on its Vera Rubin design, touting early customers (including OpenAI), staking its claim in the CPU industry—and throwing shade at chiplet designs, calling it the "chiplet tax." www.wired.com/story/nvidia...
Nvidia Wants to Own Every Chip Inside AI Data Centers
Nvidia’s Vera Rubin platform combines CPUs and GPUs into a single system, reflecting the company’s growing ambition to power every layer of AI infrastructure.
www.wired.com
July 21, 2026 at 3:43 PM
Ahead of AMD's annual AI event this week, Nvidia is pulling back the curtain on its Vera Rubin design, touting early customers (including OpenAI), staking its claim in the CPU industry—and throwing shade at chiplet designs, calling it the "chiplet tax." www.wired.com/story/nvidia...
what they should do is make more smaller computers with one chiplet each
December 12, 2024 at 9:39 PM
what they should do is make more smaller computers with one chiplet each
Hey friends! My team is looking for a Chiplet Product Manager. Looking for somebody with ASIC PM experience who's technical, ideally who's gone from concept to launch.
Chiplet experience a bonus!
LMK if you're interested 😊
Link job-boards.greenhouse.io/tenstorrent/...
Chiplet experience a bonus!
LMK if you're interested 😊
Link job-boards.greenhouse.io/tenstorrent/...
Staff Product Manager, Chiplet Hardware
United States
job-boards.greenhouse.io
April 22, 2025 at 5:40 PM
Hey friends! My team is looking for a Chiplet Product Manager. Looking for somebody with ASIC PM experience who's technical, ideally who's gone from concept to launch.
Chiplet experience a bonus!
LMK if you're interested 😊
Link job-boards.greenhouse.io/tenstorrent/...
Chiplet experience a bonus!
LMK if you're interested 😊
Link job-boards.greenhouse.io/tenstorrent/...
Rigetti Computing is exploring a chiplet architecture to scale toward 1,000 qubits faster by linking smaller quantum modules. This modular strategy aims to overcome size and error challenges in larger processors.
#Quantum #QuantumComputing #technology #Science
#Quantum #QuantumComputing #technology #Science
Can Rigetti's Chiplet Approach Fast-Track the 1,000-Qubit Milestone?
RGTI's chiplet strategy is turning its 1,000-qubit ambition into a stepwise plan, with 36-qubit modules already nearing 99.5% fidelity ahead of 2027 goals.
finance.yahoo.com
February 22, 2026 at 3:27 PM
Rigetti Computing is exploring a chiplet architecture to scale toward 1,000 qubits faster by linking smaller quantum modules. This modular strategy aims to overcome size and error challenges in larger processors.
#Quantum #QuantumComputing #technology #Science
#Quantum #QuantumComputing #technology #Science
EdgeCortix Launches Scalable RAIDEN AI Chiplet Platform
EdgeCortix Inc. has introduced RAIDEN, a scalable AI chiplet platform designed for energy-efficient physical AI applications deployed outside centralized data…
https://www.embedded.com/edgecortix-launches-scalable-raiden-ai-chiplet-platform/
EdgeCortix Inc. has introduced RAIDEN, a scalable AI chiplet platform designed for energy-efficient physical AI applications deployed outside centralized data…
https://www.embedded.com/edgecortix-launches-scalable-raiden-ai-chiplet-platform/
EdgeCortix Launches Scalable RAIDEN AI Chiplet Platform
EdgeCortix Inc. has introduced RAIDEN, a scalable AI chiplet platform designed for energy-efficient physical AI applications deployed outside centralized data centers. The architecture combines compute, memory, bandwidth, connectivity, and software within a common platform that scales from a single compute die to a four-die configuration. The flagship RAIDEN-X4 delivers up to 3.36 PFLOPS of FP4 AI compute, 256 GB of memory, 548 GB/s of memory bandwidth, and up to 1.54 TB/s of aggregate die-to-die bandwidth. The RAIDEN family comprises single-die X1, two-die X2, and four-die X4 configurations. All variants use EdgeCortix’s DNA-X accelerator architecture and MERA software stack, allowing compute and memory resources to scale while maintaining a common software environment.
www.embedded.com
September 24, 2026 at 9:00 PM
EdgeCortix Launches Scalable RAIDEN AI Chiplet Platform
EdgeCortix Inc. has introduced RAIDEN, a scalable AI chiplet platform designed for energy-efficient physical AI applications deployed outside centralized data…
https://www.embedded.com/edgecortix-launches-scalable-raiden-ai-chiplet-platform/
EdgeCortix Inc. has introduced RAIDEN, a scalable AI chiplet platform designed for energy-efficient physical AI applications deployed outside centralized data…
https://www.embedded.com/edgecortix-launches-scalable-raiden-ai-chiplet-platform/
It is an absolutely bizarre CPU.
Essentially the same topology as the 128-core EPYCs, but with 7 cores disabled on every chiplet!
Honestly a nightmare for synchronized multithreaded code, because communicating between ANY core means you’re crossing CCDs.
Essentially the same topology as the 128-core EPYCs, but with 7 cores disabled on every chiplet!
Honestly a nightmare for synchronized multithreaded code, because communicating between ANY core means you’re crossing CCDs.
April 24, 2026 at 7:59 PM
It is an absolutely bizarre CPU.
Essentially the same topology as the 128-core EPYCs, but with 7 cores disabled on every chiplet!
Honestly a nightmare for synchronized multithreaded code, because communicating between ANY core means you’re crossing CCDs.
Essentially the same topology as the 128-core EPYCs, but with 7 cores disabled on every chiplet!
Honestly a nightmare for synchronized multithreaded code, because communicating between ANY core means you’re crossing CCDs.
AMD Instinct MI400 chiplet design to feature new Multimedia IO Dies
AMD Instinct MI400 chiplet design to feature new Multimedia IO Dies - VideoCardz.com
AMD MI400 with “CDNA Next” architecture to feature Multimedia Die AMD’s Instinct MI400 series accelerators are slated for release in 2026. These accelerators will be based on the AMD CDNA “Next”...
videocardz.com
February 2, 2025 at 1:30 PM
AMD Instinct MI400 chiplet design to feature new Multimedia IO Dies
Happy Pocky DAY! I don't really have anything for today, so here's some of my past illustrations celebrating 11.11!
feat. J-Dawg (2018), Alexandeer & Argyle (2020), and Chiplet (2022)
feat. J-Dawg (2018), Alexandeer & Argyle (2020), and Chiplet (2022)
November 12, 2023 at 5:07 AM
Happy Pocky DAY! I don't really have anything for today, so here's some of my past illustrations celebrating 11.11!
feat. J-Dawg (2018), Alexandeer & Argyle (2020), and Chiplet (2022)
feat. J-Dawg (2018), Alexandeer & Argyle (2020), and Chiplet (2022)
so my actual take is that it'd be fascinating to design around "normal memory space and flexible scheduling is chiplet-local, across chiplets you treat it as DMA to another computer", where your local scheduler can collaborate with another chiplet to migrate you if you want to move or load requires
December 12, 2024 at 9:47 PM
so my actual take is that it'd be fascinating to design around "normal memory space and flexible scheduling is chiplet-local, across chiplets you treat it as DMA to another computer", where your local scheduler can collaborate with another chiplet to migrate you if you want to move or load requires
chiplet-to-chiplet rather
October 4, 2025 at 5:30 PM
chiplet-to-chiplet rather
Latest news: SK hynix’s 321-high NAND; Cadence’s system chiplet; Eliyan’s interconnect chiplet; CEO turnovers; GF’s funding finalized; SRC’s digital twin win; Enfabrica funding; NAND flash standard and more.
semiengineering.com/chip-industr...
#semiconductor
semiengineering.com/chip-industr...
#semiconductor
Chip Industry Week In Review
SK hynix's 321-high NAND; Cadence's system chiplet; Eliyan's interconnect chiplet; CEO turnovers; GF's funding finalized; SRC's digital twin win; chiplets ramp; Enfabrica funding; NAND flash standard.
semiengineering.com
November 22, 2024 at 3:40 PM
Latest news: SK hynix’s 321-high NAND; Cadence’s system chiplet; Eliyan’s interconnect chiplet; CEO turnovers; GF’s funding finalized; SRC’s digital twin win; Enfabrica funding; NAND flash standard and more.
semiengineering.com/chip-industr...
#semiconductor
semiengineering.com/chip-industr...
#semiconductor
Microsoft Cobalt 200
- TSMC 3 nm
- two chiplets with custom HB interconnect
- 132 cores (Armv9.2), 66 per chiplet
- 3 MB private L2$
- 192 MB L3$
- 12 memory channels
- per core DVFS
www.hardwareluxx.de/index.php/ne...
- TSMC 3 nm
- two chiplets with custom HB interconnect
- 132 cores (Armv9.2), 66 per chiplet
- 3 MB private L2$
- 192 MB L3$
- 12 memory channels
- per core DVFS
www.hardwareluxx.de/index.php/ne...
November 19, 2025 at 8:29 AM
Microsoft Cobalt 200
- TSMC 3 nm
- two chiplets with custom HB interconnect
- 132 cores (Armv9.2), 66 per chiplet
- 3 MB private L2$
- 192 MB L3$
- 12 memory channels
- per core DVFS
www.hardwareluxx.de/index.php/ne...
- TSMC 3 nm
- two chiplets with custom HB interconnect
- 132 cores (Armv9.2), 66 per chiplet
- 3 MB private L2$
- 192 MB L3$
- 12 memory channels
- per core DVFS
www.hardwareluxx.de/index.php/ne...
A lil chiplet. 🥺
January 14, 2025 at 5:00 AM
A lil chiplet. 🥺
TeraPHY’s 2 Tb/s @ 5 pJ/bit = 10 W, 10 ns + time of flight chiplet (separate SuperNova lasers) was and is compelling.
Next gen UCIe chiplet doubles bandwidth.
This or something comparable seems inevitable and urgent, but boiling the packaging/test ocean takes time.
Thrilled to see them at SC.
Next gen UCIe chiplet doubles bandwidth.
This or something comparable seems inevitable and urgent, but boiling the packaging/test ocean takes time.
Thrilled to see them at SC.
AI ambition is pushing copper to its breaking point
AI ambition is pushing copper to its breaking point
Ayar Labs contends silicon photonics will be key to scaling beyond the rack and taming the heat
SC24 Datacenters have been trending toward denser, more power-hungry systems for years. In case you missed it, 19-inch racks are now pushing power demands…
dlvr.it
November 28, 2024 at 2:58 PM
TeraPHY’s 2 Tb/s @ 5 pJ/bit = 10 W, 10 ns + time of flight chiplet (separate SuperNova lasers) was and is compelling.
Next gen UCIe chiplet doubles bandwidth.
This or something comparable seems inevitable and urgent, but boiling the packaging/test ocean takes time.
Thrilled to see them at SC.
Next gen UCIe chiplet doubles bandwidth.
This or something comparable seems inevitable and urgent, but boiling the packaging/test ocean takes time.
Thrilled to see them at SC.
Uma equipe de cientistas chineses foi capaz de desenvolver um chiplet fotônico em grande escala de #InteligênciaArtificialGeral. Parabéns #China! Mesmo com todo o boicote por parte dos EUA, vc está se superando e saindo na frente. 👏👏👏👏👏
rtbrasil.com/noticias/175...
rtbrasil.com/noticias/175...
Cientistas chineses atingem avanço que pode revolucionar a Inteligência Artificial
Um chiplet recentemente descoberto pode significar "um paradigma de computação", que poderia "resolver os desafios da IA", segundo a agência Xinhua.
rtbrasil.com
April 15, 2024 at 1:02 AM
Uma equipe de cientistas chineses foi capaz de desenvolver um chiplet fotônico em grande escala de #InteligênciaArtificialGeral. Parabéns #China! Mesmo com todo o boicote por parte dos EUA, vc está se superando e saindo na frente. 👏👏👏👏👏
rtbrasil.com/noticias/175...
rtbrasil.com/noticias/175...