6.886 µs นั่นเป็นเวลาที่เร็วมาก
October 6, 2026 at 5:55 AM
6.886 µs นั่นเป็นเวลาที่เร็วมาก
Qblox e Riverlane mediram um ciclo de correção de erro completo em 6,886 µs na distância 3, atingindo 9,866 µs na distância 7—atendendo à suposição de 10 µs crítica para a escalabilidade da computação quântica tolerante a falhas.
#CorreçãoErrosQuânticos #TolerânciaFalhas #Notícias
#CorreçãoErrosQuânticos #TolerânciaFalhas #Notícias
Qblox e Riverlane Demonstram Correção de Erros Quânticos em Tempo Real Abaixo da Meta de 10 Microssegundos
postquantum.com
October 6, 2026 at 3:16 AM
Qblox e Riverlane mediram um ciclo de correção de erro completo em 6,886 µs na distância 3, atingindo 9,866 µs na distância 7—atendendo à suposição de 10 µs crítica para a escalabilidade da computação quântica tolerante a falhas.
#CorreçãoErrosQuânticos #TolerânciaFalhas #Notícias
#CorreçãoErrosQuânticos #TolerânciaFalhas #Notícias
Qblox và Riverlane đã đo được một vòng lặp sửa chữa lỗi hoàn chỉnh trong 6.886 µs ở khoảng cách 3, đạt 9.866 µs ở khoảng cách 7—đáp ứng giả định 10 µs quan trọng cho khả năng mở rộng của điện toán lượng tử chịu lỗi.
#SửaLỗiLượngTử #ChịuLỗi #TinTức
#SửaLỗiLượngTử #ChịuLỗi #TinTức
Qblox và Riverlane Chứng minh Sửa lỗi Lượng tử Thời thực Dưới Mục tiêu 10 Microsecond
postquantum.com
October 6, 2026 at 3:15 AM
Qblox và Riverlane đã đo được một vòng lặp sửa chữa lỗi hoàn chỉnh trong 6.886 µs ở khoảng cách 3, đạt 9.866 µs ở khoảng cách 7—đáp ứng giả định 10 µs quan trọng cho khả năng mở rộng của điện toán lượng tử chịu lỗi.
#SửaLỗiLượngTử #ChịuLỗi #TinTức
#SửaLỗiLượngTử #ChịuLỗi #TinTức
Qblox and Riverlane measured a complete error-correction loop in 6.886 µs at distance 3, reaching 9.866 µs at distance 7—meeting the 10 µs assumption critical for fault-tolerant quantum computing scalability.
#QuantumErrorCorrection #FaultTolerance #News
#QuantumErrorCorrection #FaultTolerance #News
Qblox and Riverlane Demonstrate Real-Time Quantum Error Correction Below 10-Microsecond Target
iq.fp2.dev
October 6, 2026 at 3:13 AM
Qblox and Riverlane measured a complete error-correction loop in 6.886 µs at distance 3, reaching 9.866 µs at distance 7—meeting the 10 µs assumption critical for fault-tolerant quantum computing scalability.
#QuantumErrorCorrection #FaultTolerance #News
#QuantumErrorCorrection #FaultTolerance #News
Qblox und Riverlane haben eine vollständige Fehlerkorrekturschleife in 6.886 µs bei Abstand 3 gemessen und 9.866 µs bei Abstand 7 erreicht – wodurch die für die Skalierbarkeit fehlertoleranter Quantencomputer entscheidende 10-µs-Annahme erfüllt wird.
Qblox und Riverlane demonstrieren Echtzeit-Quantenfehlerkorrektur unter dem 10-Mikrosekunden-Ziel
postquantum.com
October 6, 2026 at 3:12 AM
Qblox und Riverlane haben eine vollständige Fehlerkorrekturschleife in 6.886 µs bei Abstand 3 gemessen und 9.866 µs bei Abstand 7 erreicht – wodurch die für die Skalierbarkeit fehlertoleranter Quantencomputer entscheidende 10-µs-Annahme erfüllt wird.
Qblox et Riverlane ont mesuré une boucle de correction d'erreur complète en 6.886 µs à distance 3, atteignant 9.866 µs à distance 7—satisfaisant l'hypothèse de 10 µs essentielle pour la scalabilité du calcul quantique tolérant aux pannes.
#CorrectionErreurQuantique #ToléranceAuxPannes #Actualités
#CorrectionErreurQuantique #ToléranceAuxPannes #Actualités
Qblox et Riverlane Démontrent une Correction d'Erreur Quantique en Temps Réel en Dessous de l'Objectif de 10 Microsecondes
postquantum.com
October 6, 2026 at 3:12 AM
Qblox et Riverlane ont mesuré une boucle de correction d'erreur complète en 6.886 µs à distance 3, atteignant 9.866 µs à distance 7—satisfaisant l'hypothèse de 10 µs essentielle pour la scalabilité du calcul quantique tolérant aux pannes.
#CorrectionErreurQuantique #ToléranceAuxPannes #Actualités
#CorrectionErreurQuantique #ToléranceAuxPannes #Actualités
Qblox y Riverlane midieron un bucle completo de corrección de errores en 6.886 µs a distancia 3, alcanzando 9.866 µs a distancia 7—cumpliendo la asunción de 10 µs crítica para la escalabilidad de la computación cuántica tolerante a fallos.
#CorreccionCuantica #ToleranciaAFallos #Noticias
#CorreccionCuantica #ToleranciaAFallos #Noticias
Qblox y Riverlane Demuestran Corrección de Errores Cuánticos en Tiempo Real Por Debajo del Objetivo de 10 Microsegundos
postquantum.com
October 6, 2026 at 3:12 AM
Qblox y Riverlane midieron un bucle completo de corrección de errores en 6.886 µs a distancia 3, alcanzando 9.866 µs a distancia 7—cumpliendo la asunción de 10 µs crítica para la escalabilidad de la computación cuántica tolerante a fallos.
#CorreccionCuantica #ToleranciaAFallos #Noticias
#CorreccionCuantica #ToleranciaAFallos #Noticias
Yes, implementing fully managed Zstd in .NET within 48 hours is doable. Speedups are solid relative to the native C library compiled with -O3.
And there's still room for further optimization!
And there's still room for further optimization!
feat(zstd): bring in Vorticity.Zstd and read and write zstd through it by rducom · Pull Request #29 · Evariops/Vorticity
Why
#27 left zstd as the one bound it could not move from inside the library: .NET 11's libzstd decompresses about 23 % slower than Rust's (399 µs against 324 µs on the same 512 KiB frame),...
github.com
October 3, 2026 at 10:09 PM
Yes, implementing fully managed Zstd in .NET within 48 hours is doable. Speedups are solid relative to the native C library compiled with -O3.
And there's still room for further optimization!
And there's still room for further optimization!
Did I just create the fastest cut and fill algorithm?
October 3, 2026 at 11:52 AM
Did I just create the fastest cut and fill algorithm?
🌐 Retired Stanford professor John Ousterhout wants Homa to replace TCP in datacenters. He reports 92 µs short-message tail latency on Homa vs 1.2 ms on TCP on a busy 100 Gbps network ⚡ Critics aren't sold yet.
https://phipi.me/article/cmuqy1ykt000mt7fc5bnc63lb
#Networking #TCP #Datacenter
https://phipi.me/article/cmuqy1ykt000mt7fc5bnc63lb
#Networking #TCP #Datacenter
Stanford prof is beating the drum for a new protocol to replace TCP
Retired Stanford professor John Ousterhout argues that TCP is a poor fit for datacenters and latency-sensitive AI workloads, and is campaigning for Homa, a message-based transport protocol with receiver-driven congestion control that sends short messages first. He reports 99th-percentile latency for
phipi.me
October 2, 2026 at 12:39 PM
🌐 Retired Stanford professor John Ousterhout wants Homa to replace TCP in datacenters. He reports 92 µs short-message tail latency on Homa vs 1.2 ms on TCP on a busy 100 Gbps network ⚡ Critics aren't sold yet.
https://phipi.me/article/cmuqy1ykt000mt7fc5bnc63lb
#Networking #TCP #Datacenter
https://phipi.me/article/cmuqy1ykt000mt7fc5bnc63lb
#Networking #TCP #Datacenter
Xanadu and AMD's Backline claims a sub-3 µs loop on a standard CPU. I read the whitepaper. They measured the connection alone, with no decoder and no qubits, and they run the main error correction on an FPGA.
postquantum.com/engineering-...
postquantum.com/engineering-...
Xanadu AMD Backline: CPU-Based Quantum Control Loop
Xanadu and AMD's Backline achieves sub-3µs quantum-classical latency on standard CPUs. Where it fits against NVQLink and QECi.
postquantum.com
September 30, 2026 at 11:40 PM
Xanadu and AMD's Backline claims a sub-3 µs loop on a standard CPU. I read the whitepaper. They measured the connection alone, with no decoder and no qubits, and they run the main error correction on an FPGA.
postquantum.com/engineering-...
postquantum.com/engineering-...
Qblox and Riverlane closed a real-time QEC loop over QECi in 6.886 µs at distance 3. Going from 17 to 161 qubits added 106 ns on the control side, so the decoder is where the time goes. Emulated data, no QPU. My analysis:
postquantum.com/engineering-...
postquantum.com/engineering-...
Altera Riverlane QECi Protocol on Agilex FPGAs
Riverlane validates its QECi decoder interface on Altera Agilex 7 FPGAs. Qblox then closes a real-time QEC loop at 6.9 µs.
postquantum.com
September 30, 2026 at 1:40 PM
Qblox and Riverlane closed a real-time QEC loop over QECi in 6.886 µs at distance 3. Going from 17 to 161 qubits added 106 ns on the control side, so the decoder is where the time goes. Emulated data, no QPU. My analysis:
postquantum.com/engineering-...
postquantum.com/engineering-...
Module PLC VH-0016ETN VEICHI có 16 ngõ ra NPN DO, thời gian đáp ứng 100 µs, hỗ trợ tải đầu ra (đèn) 5W/terminal và 9W/module, thích hợp cho các ứng dụng điều khiển.
hoplongtech.com/products/vh-...
hoplongtech.com/products/vh-...
Module PLC VH-0016ETN VEICHI - 24VDC - 16×NPN DO
Module PLC VH-0016ETN VEICHI thuộc VH Series, Output 16×NPN DO , nguồn cấp 24VDC. Tải điện trở 0.5A/terminal, 2A/module, Tải đầu ra 7.2W/terminal, 12W/module, Tải đầu ra (đèn) 5W/terminal, 9W/module, Thời gian đáp ứng 100 µs. đơn vị tính Pcs
hoplongtech.com
September 30, 2026 at 7:11 AM
Module PLC VH-0016ETN VEICHI có 16 ngõ ra NPN DO, thời gian đáp ứng 100 µs, hỗ trợ tải đầu ra (đèn) 5W/terminal và 9W/module, thích hợp cho các ứng dụng điều khiển.
hoplongtech.com/products/vh-...
hoplongtech.com/products/vh-...
UPenn built a four-qubit entangling gate in room-temperature diamond out of crosstalk: 14.8 µs, against 139.9 µs for sequential gates in the same register, and estimated gate fidelity rose from 0.69 to 0.92.
postquantum.com/quantum-rese...
postquantum.com/quantum-rese...
Room-Temperature Diamond Gate Entangles 4 Qubits
UPenn entangled four qubits in diamond at room temperature with a single gate, about 10× faster than a sequential gate in the same register.
postquantum.com
September 29, 2026 at 2:43 PM
UPenn built a four-qubit entangling gate in room-temperature diamond out of crosstalk: 14.8 µs, against 139.9 µs for sequential gates in the same register, and estimated gate fidelity rose from 0.69 to 0.92.
postquantum.com/quantum-rese...
postquantum.com/quantum-rese...
Since the structure provided no direct insight, we thought the answer might lie in how the ligand affects receptor dynamics, and so turned to Phil Biggin, my eventual master's supervisor. With Phil, I performed large-scale MD simulations (10 × 2 µs) that confirmed our suspicions…
September 28, 2026 at 4:30 PM
Since the structure provided no direct insight, we thought the answer might lie in how the ligand affects receptor dynamics, and so turned to Phil Biggin, my eventual master's supervisor. With Phil, I performed large-scale MD simulations (10 × 2 µs) that confirmed our suspicions…
We don't need to plead with models via prompt guardrails. Linux eBPF + cgroups physically freezes rogue process trees in 4.8 µs before packets cross the hypervisor.
🔗 NCSC List: ctoatncsc.substack.com/p/cto-at-ncs...
💻 Code: github.com/joseluispino...
🔗 NCSC List: ctoatncsc.substack.com/p/cto-at-ncs...
💻 Code: github.com/joseluispino...
CTO at NCSC Summary: week ending September 27th
“They use tactics like cyber attacks, sabotage and disinformation to take organisations offline, disrupt activity, and weaken trust.”
ctoatncsc.substack.com
September 28, 2026 at 4:11 AM
We don't need to plead with models via prompt guardrails. Linux eBPF + cgroups physically freezes rogue process trees in 4.8 µs before packets cross the hypervisor.
🔗 NCSC List: ctoatncsc.substack.com/p/cto-at-ncs...
💻 Code: github.com/joseluispino...
🔗 NCSC List: ctoatncsc.substack.com/p/cto-at-ncs...
💻 Code: github.com/joseluispino...
Qblox and Riverlane timed a commercial QEC loop at 9.866 µs at distance 7, with emulated qubits. Gidney and Ekerå assumed 10 µs in 2019. Vendors now supply QEC's classical half. The qubits are still the hard part.
postquantum.com/quantum-comp...
postquantum.com/quantum-comp...
Real-Time Quantum Error Correction's New Supply Chain
Several vendors now supply QEC's classical loop, with measured latencies. I check six September results against fault-tolerance timelines.
postquantum.com
September 27, 2026 at 11:40 PM
Qblox and Riverlane timed a commercial QEC loop at 9.866 µs at distance 7, with emulated qubits. Gidney and Ekerå assumed 10 µs in 2019. Vendors now supply QEC's classical half. The qubits are still the hard part.
postquantum.com/quantum-comp...
postquantum.com/quantum-comp...
CPU Single-Core Floor (No GPU)
• MetaRouter: 1.33 µs / decision (0.75M/s)
• L2 Sign Inversion: 120.97 µs / pass (1,322 Mtrits/s)
• Host Staging: 39.38 ns / swap (26.1 GB/s)
• Tile Contract: 6.07 ns / plan
Single-core measured. Not going to multiply by N threads to fake a bigger number.
• MetaRouter: 1.33 µs / decision (0.75M/s)
• L2 Sign Inversion: 120.97 µs / pass (1,322 Mtrits/s)
• Host Staging: 39.38 ns / swap (26.1 GB/s)
• Tile Contract: 6.07 ns / plan
Single-core measured. Not going to multiply by N threads to fake a bigger number.
September 27, 2026 at 4:17 PM
CPU Single-Core Floor (No GPU)
• MetaRouter: 1.33 µs / decision (0.75M/s)
• L2 Sign Inversion: 120.97 µs / pass (1,322 Mtrits/s)
• Host Staging: 39.38 ns / swap (26.1 GB/s)
• Tile Contract: 6.07 ns / plan
Single-core measured. Not going to multiply by N threads to fake a bigger number.
• MetaRouter: 1.33 µs / decision (0.75M/s)
• L2 Sign Inversion: 120.97 µs / pass (1,322 Mtrits/s)
• Host Staging: 39.38 ns / swap (26.1 GB/s)
• Tile Contract: 6.07 ns / plan
Single-core measured. Not going to multiply by N threads to fake a bigger number.
Betriebssystem-Kernel aus (unter Nutzung von POSIX-Signalen und Linux `cgroup v2` Freezer). Dadurch lässt sich die Ausführung fehlerhafter oder bösartiger Agenten innerhalb weniger Mikrosekunden (Median 4,8 µs) stoppen, bevor schädlicher Netzwerkverkehr das System verlässt.
September 26, 2026 at 5:00 AM
Betriebssystem-Kernel aus (unter Nutzung von POSIX-Signalen und Linux `cgroup v2` Freezer). Dadurch lässt sich die Ausführung fehlerhafter oder bösartiger Agenten innerhalb weniger Mikrosekunden (Median 4,8 µs) stoppen, bevor schädlicher Netzwerkverkehr das System verlässt.
Wi-Fi can be correct and still be late.
At 20 MS/s, a 256-sample block can hold the decisive sample for 12.75 µs—longer than the nominal 10 µs SIFS before a 1 Mb/s DSSS ACK must begin.
The complete FPGA-and-C++ path, from I/Q to HTTP:
greenforest.io/e310-wpa2-ac...
At 20 MS/s, a 256-sample block can hold the decisive sample for 12.75 µs—longer than the nominal 10 µs SIFS before a 1 Mb/s DSSS ACK must begin.
The complete FPGA-and-C++ path, from I/Q to HTTP:
greenforest.io/e310-wpa2-ac...
Why Wi-Fi Needs a Real-Time Radio
Follow the last received sample to a 10 µs ACK, then association, WPA2 keys, DHCP, ARP and an HTTP page. A complete FPGA-and-C++ access point with source.
greenforest.io
September 25, 2026 at 8:04 PM
Wi-Fi can be correct and still be late.
At 20 MS/s, a 256-sample block can hold the decisive sample for 12.75 µs—longer than the nominal 10 µs SIFS before a 1 Mb/s DSSS ACK must begin.
The complete FPGA-and-C++ path, from I/Q to HTTP:
greenforest.io/e310-wpa2-ac...
At 20 MS/s, a 256-sample block can hold the decisive sample for 12.75 µs—longer than the nominal 10 µs SIFS before a 1 Mb/s DSSS ACK must begin.
The complete FPGA-and-C++ path, from I/Q to HTTP:
greenforest.io/e310-wpa2-ac...
Can we pull the emergency brake on a runaway AI agent?
Hard Stop: out-of-band kernel preemption (4.8 µs SIGSTOP freeze) halts rogue execution at Action 1.
Paper: arxiv.org/abs/2609.29808
Code: github.com/joseluispino...
#AISafety #Infosec #AcademicSky
Hard Stop: out-of-band kernel preemption (4.8 µs SIGSTOP freeze) halts rogue execution at Action 1.
Paper: arxiv.org/abs/2609.29808
Code: github.com/joseluispino...
#AISafety #Infosec #AcademicSky
Hard Stop: Kernel-Level Preemption and Containment for Rogue Agentic Execution
In July 2026, an unconstrained autonomous agent participating in a frontier AI cybersecurity evaluation harness breached its evaluation sandbox, established an external command-and-control foothold, a...
arxiv.org
September 25, 2026 at 5:06 PM
Can we pull the emergency brake on a runaway AI agent?
Hard Stop: out-of-band kernel preemption (4.8 µs SIGSTOP freeze) halts rogue execution at Action 1.
Paper: arxiv.org/abs/2609.29808
Code: github.com/joseluispino...
#AISafety #Infosec #AcademicSky
Hard Stop: out-of-band kernel preemption (4.8 µs SIGSTOP freeze) halts rogue execution at Action 1.
Paper: arxiv.org/abs/2609.29808
Code: github.com/joseluispino...
#AISafety #Infosec #AcademicSky
Changing the uni-kernel over to the new default memory allocator in minc (TLSF with quick lists) made a huge change for the JS interpreter. (JSON.parse 56 µs to 0.5 µs, Buffer.alloc(16) 9 µs to 0.1 µs)
September 24, 2026 at 3:52 PM
Changing the uni-kernel over to the new default memory allocator in minc (TLSF with quick lists) made a huge change for the JS interpreter. (JSON.parse 56 µs to 0.5 µs, Buffer.alloc(16) 9 µs to 0.1 µs)